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x86_64: Refactor PCI0's ACPI generation

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Minor code refactor to improve readability.

BUG=b:194390621
TEST=Dump DSDT with and without this patch; then ensure they are
     identical

Change-Id: Iccc62803788c3e44ce5f0cb8322831c015a95f85
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3844815
Auto-Submit: Victor Ding <victording@chromium.org>
Tested-by: Victor Ding <victording@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Victor Ding <victording@chromium.org>
This commit is contained in:
Victor Ding 2022-08-17 13:17:03 +00:00 committed by crosvm LUCI
parent 26f53eb732
commit 06c376eba5
1 changed files with 17 additions and 23 deletions
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40
x86_64/src/lib.rs
View file

@ -1693,29 +1693,23 @@ impl X8664arch {
crs_entries.push(entry);
}
let mut pci_dsdt_inner_data: Vec<&dyn aml::Aml> = Vec::new();
let hid = aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A08"));
pci_dsdt_inner_data.push(&hid);
let cid = aml::Name::new("_CID".into(), &aml::EISAName::new("PNP0A03"));
pci_dsdt_inner_data.push(&cid);
let adr = aml::Name::new("_ADR".into(), &aml::ZERO);
pci_dsdt_inner_data.push(&adr);
let seg = aml::Name::new("_SEG".into(), &aml::ZERO);
pci_dsdt_inner_data.push(&seg);
let uid = aml::Name::new("_UID".into(), &aml::ZERO);
pci_dsdt_inner_data.push(&uid);
let supp = aml::Name::new("SUPP".into(), &aml::ZERO);
pci_dsdt_inner_data.push(&supp);
let crs = aml::Name::new(
"_CRS".into(),
&aml::ResourceTemplate::new(crs_entries.iter().map(|b| b.as_ref()).collect()),
);
pci_dsdt_inner_data.push(&crs);
let pci_root_osc = PciRootOSC {};
pci_dsdt_inner_data.push(&pci_root_osc);
aml::Device::new("_SB_.PCI0".into(), pci_dsdt_inner_data).to_aml_bytes(&mut amls);
aml::Device::new(
"_SB_.PCI0".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A08")),
&aml::Name::new("_CID".into(), &aml::EISAName::new("PNP0A03")),
&aml::Name::new("_ADR".into(), &aml::ZERO),
&aml::Name::new("_SEG".into(), &aml::ZERO),
&aml::Name::new("_UID".into(), &aml::ZERO),
&aml::Name::new("SUPP".into(), &aml::ZERO),
&aml::Name::new(
"_CRS".into(),
&aml::ResourceTemplate::new(crs_entries.iter().map(|b| b.as_ref()).collect()),
),
&PciRootOSC {},
],
)
.to_aml_bytes(&mut amls);
let pm = Arc::new(Mutex::new(pmresource));
io_bus