From 4dd6ddbc3926d308479cf1db5055cd93967cb609 Mon Sep 17 00:00:00 2001 From: Daniel Verkamp Date: Fri, 14 Jun 2019 15:22:40 -0700 Subject: [PATCH] devices: pci: allocate BARs with correct alignment Each PCI BAR must be aligned to at least its own size to allow the BAR sizing mechanism to work. Change all BAR allocations to use allocate_with_align(), specifying the size as the alignment. In particular, this fixes the alignment of the XHCI BAR, whose size is larger than a page (the default MMIO allocator alignment). BUG=None TEST=Boot vm_kernel in crosvm Change-Id: Icba03771a896b9b4feae608efdb7685fe24f8b98 Signed-off-by: Daniel Verkamp Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1660202 Tested-by: kokoro Reviewed-by: Dylan Reid --- devices/src/pci/ac97.rs | 6 ++++-- devices/src/usb/xhci/xhci_controller.rs | 3 ++- devices/src/virtio/virtio_pci_device.rs | 6 ++++-- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/devices/src/pci/ac97.rs b/devices/src/pci/ac97.rs index aeab1f119c..ff6c1e2597 100644 --- a/devices/src/pci/ac97.rs +++ b/devices/src/pci/ac97.rs @@ -150,10 +150,11 @@ impl PciDevice for Ac97Dev { let mut ranges = Vec::new(); let mixer_regs_addr = resources .mmio_allocator() - .allocate( + .allocate_with_align( MIXER_REGS_SIZE, Alloc::PciBar { bus, dev, bar: 0 }, "ac97-mixer_regs".to_string(), + MIXER_REGS_SIZE, ) .map_err(|e| pci_device::Error::IoAllocationFailed(MIXER_REGS_SIZE, e))?; let mixer_config = PciBarConfiguration::default() @@ -167,10 +168,11 @@ impl PciDevice for Ac97Dev { let master_regs_addr = resources .mmio_allocator() - .allocate( + .allocate_with_align( MASTER_REGS_SIZE, Alloc::PciBar { bus, dev, bar: 1 }, "ac97-master_regs".to_string(), + MASTER_REGS_SIZE, ) .map_err(|e| pci_device::Error::IoAllocationFailed(MASTER_REGS_SIZE, e))?; let master_config = PciBarConfiguration::default() diff --git a/devices/src/usb/xhci/xhci_controller.rs b/devices/src/usb/xhci/xhci_controller.rs index 76e1d4a4d8..453f056194 100644 --- a/devices/src/usb/xhci/xhci_controller.rs +++ b/devices/src/usb/xhci/xhci_controller.rs @@ -216,10 +216,11 @@ impl PciDevice for XhciController { // xHCI spec 5.2.1. let bar0_addr = resources .mmio_allocator() - .allocate( + .allocate_with_align( XHCI_BAR0_SIZE, Alloc::PciBar { bus, dev, bar: 0 }, "xhci_bar0".to_string(), + XHCI_BAR0_SIZE, ) .map_err(|e| PciDeviceError::IoAllocationFailed(XHCI_BAR0_SIZE, e))?; let bar0_config = PciBarConfiguration::default() diff --git a/devices/src/virtio/virtio_pci_device.rs b/devices/src/virtio/virtio_pci_device.rs index 45bd423b1f..a9e54fadc0 100644 --- a/devices/src/virtio/virtio_pci_device.rs +++ b/devices/src/virtio/virtio_pci_device.rs @@ -340,13 +340,14 @@ impl PciDevice for VirtioPciDevice { let mut ranges = Vec::new(); let settings_config_addr = resources .mmio_allocator() - .allocate( + .allocate_with_align( CAPABILITY_BAR_SIZE, Alloc::PciBar { bus, dev, bar: 0 }, format!( "virtio-{}-cap_bar", type_to_str(self.device.device_type()).unwrap_or("?") ), + CAPABILITY_BAR_SIZE, ) .map_err(|e| PciDeviceError::IoAllocationFailed(CAPABILITY_BAR_SIZE, e))?; let config = PciBarConfiguration::default() @@ -377,7 +378,7 @@ impl PciDevice for VirtioPciDevice { for config in self.device.get_device_bars() { let device_addr = resources .device_allocator() - .allocate( + .allocate_with_align( config.get_size(), Alloc::PciBar { bus, @@ -388,6 +389,7 @@ impl PciDevice for VirtioPciDevice { "virtio-{}-custom_bar", type_to_str(self.device.device_type()).unwrap_or("?") ), + config.get_size(), ) .map_err(|e| PciDeviceError::IoAllocationFailed(config.get_size(), e))?; let config = config.set_address(device_addr);