From 569a96bed8be171e2a435c3374862c96901ec95e Mon Sep 17 00:00:00 2001
From: Daniel Verkamp <dverkamp@chromium.org>
Date: Tue, 21 Jun 2022 15:20:36 -0700
Subject: [PATCH] hypervisor: x86_64: impl Default for Regs

Replace the automatically derived Default with a manual implementation
so we can set bit 1 of the flags register to 1. This is architecturally
defined to be an always-1 bit (for reasons dating back to 8080/8085
source-level compatibility on the 8086), so we should not create a value
where bit 1 isn't set.

BUG=b:234155022
TEST=tools/presubmit

Change-Id: I7835e5a04385654a667b55e2e2ea2121b5807288
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3717524
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
---
 hypervisor/src/x86_64.rs | 27 ++++++++++++++++++++++++++-
 x86_64/src/regs.rs       |  1 -
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/hypervisor/src/x86_64.rs b/hypervisor/src/x86_64.rs
index 90980bea0c..fbb938434a 100644
--- a/hypervisor/src/x86_64.rs
+++ b/hypervisor/src/x86_64.rs
@@ -547,7 +547,7 @@ impl IrqRoute {
 
 /// State of a VCPU's general purpose registers.
 #[repr(C)]
-#[derive(Debug, Default, Copy, Clone)]
+#[derive(Debug, Copy, Clone)]
 pub struct Regs {
     pub rax: u64,
     pub rbx: u64,
@@ -569,6 +569,31 @@ pub struct Regs {
     pub rflags: u64,
 }
 
+impl Default for Regs {
+    fn default() -> Self {
+        Regs {
+            rax: 0,
+            rbx: 0,
+            rcx: 0,
+            rdx: 0,
+            rsi: 0,
+            rdi: 0,
+            rsp: 0,
+            rbp: 0,
+            r8: 0,
+            r9: 0,
+            r10: 0,
+            r11: 0,
+            r12: 0,
+            r13: 0,
+            r14: 0,
+            r15: 0,
+            rip: 0,
+            rflags: 0x2, // Bit 1 (0x2) is always 1.
+        }
+    }
+}
+
 /// State of a memory segment.
 #[repr(C)]
 #[derive(Debug, Default, Copy, Clone)]
diff --git a/x86_64/src/regs.rs b/x86_64/src/regs.rs
index 6ffdf71575..906a52efd0 100644
--- a/x86_64/src/regs.rs
+++ b/x86_64/src/regs.rs
@@ -229,7 +229,6 @@ pub fn setup_fpu(vcpu: &dyn VcpuX86_64) -> Result<()> {
 /// * `boot_si` - Must point to zero page address per Linux ABI.
 pub fn setup_regs(vcpu: &dyn VcpuX86_64, boot_ip: u64, boot_sp: u64, boot_si: u64) -> Result<()> {
     let regs = Regs {
-        rflags: 0x0000000000000002u64,
         rip: boot_ip,
         rsp: boot_sp,
         rbp: boot_sp,