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x86: Expose hybrid CPU info to Guest
At present, when set host-cpu-topology option, the Guest still can't get the hybrid information. Now, for ADL, the hybrid related info is needed. These info include the hybrid part flag (bit 15) in leaf 7 of CPUID, the core type and native model id in leaf 1A of CPUID. BUG=None TEST=cargo build TEST=Check the CPUID dump of Guest and Host Change-Id: Icc03bc50160fdffc221e992d90225e7ed8081e8d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3314867 Reviewed-by: David Stevens <stevensd@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
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@ -35,6 +35,7 @@ const ECX_TOPO_TYPE_SHIFT: u32 = 8; // Topology Level type.
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const ECX_TOPO_SMT_TYPE: u32 = 1; // SMT type.
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const ECX_TOPO_CORE_TYPE: u32 = 2; // CORE type.
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const EAX_CPU_CORES_SHIFT: u32 = 26; // Index of cpu cores in the same physical package.
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const EDX_HYBRID_CPU_SHIFT: u32 = 15; // Hybrid. The processor is identified as a hybrid part.
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fn filter_cpuid(
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vcpu_id: usize,
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@ -110,6 +111,26 @@ fn filter_cpuid(
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// Clear X86 EPB feature. No frequency selection in the hypervisor.
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entry.ecx &= !(1 << ECX_EPB_SHIFT);
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}
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7 => {
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if host_cpu_topology && entry.index == 0 {
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// Safe because we pass 7 and 0 for this call and the host supports the
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// `cpuid` instruction
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let result = unsafe { __cpuid_count(entry.function, entry.index) };
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entry.edx |= result.edx & (1 << EDX_HYBRID_CPU_SHIFT);
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}
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}
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0x1A => {
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// Hybrid information leaf.
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if host_cpu_topology {
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// Safe because we pass 0x1A for this call and the host supports the
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// `cpuid` instruction
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let result = unsafe { __cpuid(entry.function) };
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entry.eax = result.eax;
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entry.ebx = result.ebx;
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entry.ecx = result.ecx;
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entry.edx = result.edx;
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}
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}
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0xB | 0x1F => {
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if host_cpu_topology {
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continue;
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