From 909f8cd3e5102fcf99b3a5e416bc022aa50a5354 Mon Sep 17 00:00:00 2001 From: Abhishek Bhardwaj Date: Mon, 27 Sep 2021 17:34:36 -0700 Subject: [PATCH] crosvm: Add bar index and offset to read_bar and write_bar This change adds the bar index and offset to the read_bar and write_bar methods to the VirtioDevice trait. VirtioDevice needs these parameters to implement the device bars. BUG=b:194136484 TEST=Compile. Change-Id: I48cb6e743b29467dc9707e13ce72b6b61951a6db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3188668 Reviewed-by: Chirantan Ekbote Tested-by: kokoro Commit-Queue: Abhishek Bhardwaj Auto-Submit: Abhishek Bhardwaj --- devices/src/pci/mod.rs | 6 +++--- devices/src/virtio/virtio_device.rs | 6 +++--- devices/src/virtio/virtio_pci_device.rs | 16 ++++++++++++++-- 3 files changed, 20 insertions(+), 8 deletions(-) diff --git a/devices/src/pci/mod.rs b/devices/src/pci/mod.rs index 77283c56b1..905f548aff 100644 --- a/devices/src/pci/mod.rs +++ b/devices/src/pci/mod.rs @@ -23,9 +23,9 @@ mod vfio_pci; pub use self::ac97::{Ac97Backend, Ac97Dev, Ac97Parameters}; pub use self::msix::{MsixCap, MsixConfig, MsixStatus}; pub use self::pci_configuration::{ - PciBarConfiguration, PciBarPrefetchable, PciBarRegionType, PciCapability, PciCapabilityID, - PciClassCode, PciConfiguration, PciDisplaySubclass, PciHeaderType, PciProgrammingInterface, - PciSerialBusSubClass, PciSubclass, + PciBarConfiguration, PciBarIndex, PciBarPrefetchable, PciBarRegionType, PciCapability, + PciCapabilityID, PciClassCode, PciConfiguration, PciDisplaySubclass, PciHeaderType, + PciProgrammingInterface, PciSerialBusSubClass, PciSubclass, }; pub use self::pci_device::Error as PciDeviceError; pub use self::pci_device::PciDevice; diff --git a/devices/src/virtio/virtio_device.rs b/devices/src/virtio/virtio_device.rs index a44589459f..3894e1ad25 100644 --- a/devices/src/virtio/virtio_device.rs +++ b/devices/src/virtio/virtio_device.rs @@ -8,7 +8,7 @@ use base::{Event, RawDescriptor}; use vm_memory::GuestMemory; use super::*; -use crate::pci::{MsixStatus, PciAddress, PciBarConfiguration, PciCapability}; +use crate::pci::{MsixStatus, PciAddress, PciBarConfiguration, PciBarIndex, PciCapability}; /// Trait for virtio devices to be driven by a virtio transport. /// @@ -102,10 +102,10 @@ pub trait VirtioDevice: Send { /// Reads from a BAR region mapped in to the device. /// * `addr` - The guest address inside the BAR. /// * `data` - Filled with the data from `addr`. - fn read_bar(&mut self, _addr: u64, _data: &mut [u8]) {} + fn read_bar(&mut self, _bar_index: PciBarIndex, _offset: u64, _data: &mut [u8]) {} /// Writes to a BAR region mapped in to the device. /// * `addr` - The guest address inside the BAR. /// * `data` - The data to write. - fn write_bar(&mut self, _addr: u64, _data: &[u8]) {} + fn write_bar(&mut self, _bar_index: PciBarIndex, _offset: u64, _data: &[u8]) {} } diff --git a/devices/src/virtio/virtio_pci_device.rs b/devices/src/virtio/virtio_pci_device.rs index 6db221c819..f6040aebae 100644 --- a/devices/src/virtio/virtio_pci_device.rs +++ b/devices/src/virtio/virtio_pci_device.rs @@ -593,7 +593,13 @@ impl PciDevice for VirtioPciDevice { // The driver is only allowed to do aligned, properly sized access. let bar0 = self.config_regs.get_bar_addr(self.settings_bar as usize); if addr < bar0 || addr >= bar0 + CAPABILITY_BAR_SIZE { - self.device.read_bar(addr, data); + let bar_config = self.config_regs.get_bars().find(|config| { + addr >= config.address() && addr < (config.address() + config.size()) + }); + if let Some(c) = bar_config { + self.device + .read_bar(c.bar_index(), addr - c.address(), data); + } } else { let offset = addr - bar0; match offset { @@ -645,7 +651,13 @@ impl PciDevice for VirtioPciDevice { fn write_bar(&mut self, addr: u64, data: &[u8]) { let bar0 = self.config_regs.get_bar_addr(self.settings_bar as usize); if addr < bar0 || addr >= bar0 + CAPABILITY_BAR_SIZE { - self.device.write_bar(addr, data); + let bar_config = self.config_regs.get_bars().find(|config| { + addr >= config.address() && addr < (config.address() + config.size()) + }); + if let Some(c) = bar_config { + self.device + .write_bar(c.bar_index(), addr - c.address(), data); + } } else { let offset = addr - bar0; match offset {