mirror of
https://chromium.googlesource.com/crosvm/crosvm
synced 2025-02-06 02:25:23 +00:00
devices: pci: add subsystem vendor and device ID
The virtio PCI specification places requirements on the PCI subsystem IDs, so allow PCI devices to specify them in PciConfiguration. Change-Id: I70bc6ad4333ba3601db2831fef03483bcaea70ff Signed-off-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1208156 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Dylan Reid <dgreid@chromium.org>
This commit is contained in:
parent
11809f60ab
commit
96c4a6df2d
2 changed files with 7 additions and 0 deletions
|
@ -170,6 +170,8 @@ impl PciConfiguration {
|
|||
class_code: PciClassCode,
|
||||
subclass: &PciSubclass,
|
||||
header_type: PciHeaderType,
|
||||
subsystem_vendor_id: u16,
|
||||
subsystem_id: u16,
|
||||
) -> Self {
|
||||
let mut registers = [0u32; NUM_CONFIGURATION_REGISTERS];
|
||||
registers[0] = u32::from(device_id) << 16 | u32::from(vendor_id);
|
||||
|
@ -179,6 +181,7 @@ impl PciConfiguration {
|
|||
PciHeaderType::Device => (),
|
||||
PciHeaderType::Bridge => registers[3] = 0x0001_0000,
|
||||
};
|
||||
registers[11] = u32::from(subsystem_id) << 16 | u32::from(subsystem_vendor_id);
|
||||
PciConfiguration {
|
||||
registers,
|
||||
writable_bits: [0xffff_ffff; NUM_CONFIGURATION_REGISTERS],
|
||||
|
@ -361,6 +364,8 @@ mod tests {
|
|||
PciClassCode::MultimediaController,
|
||||
&PciMultimediaSubclass::AudioController,
|
||||
PciHeaderType::Device,
|
||||
0xABCD,
|
||||
0x2468,
|
||||
);
|
||||
|
||||
// Add two capabilities with different contents.
|
||||
|
|
|
@ -110,6 +110,8 @@ impl PciRoot {
|
|||
PciClassCode::BridgeDevice,
|
||||
&PciBridgeSubclass::HostBridge,
|
||||
PciHeaderType::Bridge,
|
||||
0,
|
||||
0,
|
||||
),
|
||||
},
|
||||
config_address: 0,
|
||||
|
|
Loading…
Reference in a new issue