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devices: pci: preserve read-only bits in write_reg
The 32-bit write_reg() function for PCI configuration space masked off non-writable (read-only) bits from the incoming value, but it did not preserve the original bits from the register; this results in writes to read-only registers to clear all read-only bits to 0 instead. Preserve the original value of the read-only bits and add a test to verify that this works. BUG=None TEST=./build_test Change-Id: Icc67b429f17d519ec4e9090f8e0ce48aaff76491 Signed-off-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1660204 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Dylan Reid <dgreid@chromium.org>
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1 changed files with 20 additions and 1 deletions
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@ -291,7 +291,7 @@ impl PciConfiguration {
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/// Writes a 32bit register to `reg_idx` in the register map.
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pub fn write_reg(&mut self, reg_idx: usize, value: u32) {
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if let Some(r) = self.registers.get_mut(reg_idx) {
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*r = value & self.writable_bits[reg_idx];
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*r = (*r & !self.writable_bits[reg_idx]) | (value & self.writable_bits[reg_idx]);
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} else {
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warn!("bad PCI register write {}", reg_idx);
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}
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@ -626,4 +626,23 @@ mod tests {
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assert_eq!(subclass, 0x01);
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assert_eq!(prog_if, 0x5a);
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}
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#[test]
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fn read_only_bits() {
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let mut cfg = PciConfiguration::new(
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0x1234,
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0x5678,
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PciClassCode::MultimediaController,
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&PciMultimediaSubclass::AudioController,
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Some(&TestPI::Test),
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PciHeaderType::Device,
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0xABCD,
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0x2468,
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);
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// Attempt to overwrite vendor ID and device ID, which are read-only
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cfg.write_reg(0, 0xBAADF00D);
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// The original vendor and device ID should remain.
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assert_eq!(cfg.read_reg(0), 0x56781234);
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}
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}
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