Previously the caller of ioapic::new was responsible for calling
register_irq_event on the IOAPIC's outgoing events. The MSI IrqRoutes
for these outgoing events used the same GSIs < 24 as the incoming
PIC/IOAPIC routes.
This worked for the split irqchip, because PIC/IOAPIC events are handled
in userspace and MSI events in the kernel, so there was no confusion
about which route an event should use. But with the userspace irqchip,
the routes have to be differentiated, otherwise incoming and outgoing
IOAPIC events with the same GSI trigger each other in a loop. Also,
registering all outgoing IOAPIC events upfront increased the number of
irq event tokens by 24, even though only a few outgoing events are used.
Now the IOAPIC is responsible for registering outgoing events and it
allocates new GSIs >= 24 for its MSI routes. An event and route are
only set up when a redirection table entry is configured with non-zero
MSI data.
BUG=chromium:1077058
TES=boots with split irqchip
Change-Id: I87c1df6150d50205810759ef152e1c9b33bcfe4d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2419672
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
There were some assumptions built into the hypervisor abstraction
implementations that we would only ever be registering a single Event
for any irq number, but that is no longer the case since 1d0f160. So
this change updates the hypervisor abstraction trait functions to allow
callers of irq_event_tokens to distinguish between multiple events that
refer to the same irq number using an IrqEventIndex. This index is then
used when calling service_irq_event.
Also, if register_irq_event would add a new irq event that the main
thread should wait on, register_irq_event will return the associated
IrqEventIndex. This change also updates linux.rs to use these changes.
The --split-irqchip mode may work even without this fix, depending on
which devices are sharing irqs. If the devices using shared irqs are all
virtio pci devices they may switch to MSIx mode and then not need their
original interrupt event.
BUG=chromium:1077058
TEST=disabled MSI mode on pci devices, forced additional irq sharing,
and verified that --split-irqchip mode still works + cargo test -p
devices
Change-Id: I4feb2817b6c477284ad463c0221d1f156813b6ce
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2405300
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
This is a layer above PollContext with a more generic interface.
As PollContext is used so widely, this is quite a large change
in order to accomodate the interface update, especially with the
use of RawDescriptor. In some cases this has caused an echo
of updates to RawDescriptor, which is fine because of our eventual
goal to move the whole codebase to it regardless.
Note there are a few instances of forcing the RawDescriptor update
chain to stop, ex. ioctl. This is to keep the scope of this CL
concentrated and avoid changing entire other areas.
Note that this CL leaves out a few additional pieces of work:
- The sole usage of EpollContext over PollContext (event_loop),
which poses a bigger challenge for interface changes
- Full PollToken renaming, which is a tiny change turned difficult
due to the unavailability of type aliases for traits.
- Renaming certain methods which have been updated to use
RawDescriptor such as keep_fds. Some have enough dependencies that
they are worth avoiding to keep this CL pointed, but will be
addressed in future CLs to make sure the whole codebase is on the
fd->descriptor train
BUG=b:162363783
TEST=./build_test
Change-Id: Iff2cfe8f90dea55f1388f8e91bdc698e121a8e43
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2455726
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
This allows code to create references to traits such as `&dyn Vcpu` for
`&dyn IrqChip`. This also allows keeping such traits inside of opaque
`Box` like wrappers.
To achieve this, trait methods referencing `Self` have an additonal
`where` clause that restricts them to sized types. Associated types are
removed and replaced with their trait equivalents (as parameters) or an
opaque Box (as return values).
To work around certain cases where a concrete type is needed, such as
for KVM based `IrqChip` impls, the `downcast_rs` trait is used to allow
`dynamic_cast` style casting.
The binary size impact of this change is small. For comparison, here is
the size change with this commit:
armv7a -0.49% (-9 kiB)
aarch64 -0.17% (-3 kiB)
x86_64 +1.77% (+40 KiB)
BUG=None
TEST=build_test
Cq-Depend: chromium:2466660
Change-Id: I1a408734832d2971ea2979c1bc64b2ffe051b02d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2439298
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Note the CL size is large entirely due to the rename,
the changes are mostly negligible.
Also making a few small additional changes in sys_util
areas that don't need much attention in base. This includes
typedefing and adding specific imports for areas that don't
require significant interface changes.
BUG=b:162363783
TEST=./build_test
Change-Id: I4a2c9c4cdce7565806ed338e241c6b8c82c855c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2415180
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
Very little of substance is added here, just the base boilerplate
BUG=b:162363783
TEST=./build_test
Change-Id: I2e3b3b45cf1d7234784d769b4dced31f10a8774d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2366110
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Calls to the kvm crate have been replaced by calls to hypervisor and
devices::irqchip. Plugin is unchanged and still KVM-specific.
x86 creates and configures vcpus on the vcpu thread instead of the main
thread.
Code that still depends on kvm or kvm_sys:
- crosvm_plugin, plugin, and protos use kvm and kvm_sys if built with
the plugin feature
- devices::VfioGroup does a kvm_sys ioctl
- devices::irqchip and hypervisor use kvm_sys. hypervisor uses
kvm::Cap and kvm::CpuId internally for now.
BUG=chromium:1077058
TEST=runs es2gears_wayland on kukui
TEST=runs evince on amd64-generic with kernel and split irqchip
TEST=build_test excluding tpm2
TEST=cargo check --features plugin
Change-Id: I0068e34da6a5ff0079b1237be1958933bf12ffe4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2307711
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Richman <srichman@google.com>
For now, this crate simply re-exports all of sys_util, but it will
be updated to provide new interfaces when needed. This is the
first step to making crosvm not directly depend on sys_util, so
that we can make the interface changes we need without fear of
negatively affecting (i.e. completely breaking) other usages
within chromeos.
BUG=b:162363783
TEST=./build_test
Change-Id: I7d0aa3d8a1f66af1c7fee8fd649723ef17027150
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2325168
Tested-by: Michael Hoyle <mikehoyle@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Run unit tests for the old ioapic only on x86. Fixes use statements in
hypervisor tests. Run the hypervisor vcpu enable_feature test only on
x86, like in the kvm crate.
TEST=cargo test --no-run --target=aarch64-cros-linux-gnu
TEST=cargo test --no-run --target=aarch64-cros-linux-gnu -p devices
TEST=cargo test --no-run --target=aarch64-cros-linux-gnu -p hypervisor
BUG=1112839
Change-Id: Ie8dc152de6acd37b93e394642208a86a746c9308
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2337151
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: Steven Richman <srichman@google.com>
Commit-Queue: Steven Richman <srichman@google.com>
Move GuestAddress and GuestMemory to a new crate for VM memory. This
will make separating sys_util and crosvm independent making it easier
to use sys_util functions outside of crosvm.
Change-Id: I12e14948ea85754dfa6267b3a3fb32b77ef6796e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2311251
Auto-Submit: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Tested-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Fixes for several bugs found in the KvmKernelIrqChip and the
KvmSplitIrqChip that were found while testing the hypervisor abstraction
layer integration:
- Fixed determination of which routes are MSI routes when setting
routes in KVM.
- Fixed issue with setting conflicting routes.
- Updated service_irq_event to read the associated EventFd that
triggered the irq event, and updated the documentation. Also updated
KvmKernelIrqChip's implementation to simply print an error because
that function should never be called on KvmKernelIrqChip.
- Fixed a bug with add_vcpu in both KvmKernelIrqChip and
KvmSplitIrqChip.
BUG=chromium:1077058
TEST=added a new test, ran devices tests, ran a VM with abstraction
integration changes with both irqchips
Change-Id: I255fbe498f6586d90cb196ff173a574a2cae0453
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2300843
Reviewed-by: Udam Saini <udam@google.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Implementation of a KVM split irqchip. KVM's "split irqchip"
functionality only works for x86/x86_64 so this is implemented in the
kvm/x86_64.rs sub-module. The chip has a userspace Pic, Ioapic, and Pit.
This change necessitated a couple modifications to the irqchip traits:
- The create_pit function has been removed, and it's now implied that
the creation of the irqchip handles the creation of the pit.
- A finalize_devices function has been added. This function will need
to be called on the irqchip after all devices have been setup. The
purpose of finalize_devices is to allow the irqchip to register any
userspace devices with the io_bus or mmio_bus, and for the irqchip to
supply any necessary EventFds to these devices.
- A service_irq_event function has been added. This function works a
lot like the service_irq function, except it's specifically designed
to work the same way an IRQFD works: it first asserts then immediately
deasserts the line. If a resamplefd is associated with the irq line,
the deassert doesn't happen immediately, but happens when an EOI
occurs for a vector associated with the line. The service_irq function
will still exist for unittests.
- A process_delayed_irq_events function has been added. There
is a case where a deadlock can occur if the main thread blocks on
locking the ioapic in order to service an irq event, while a vcpu
thread holding the ioapic lock waits on the main thread to process the
addition of a MSI route. So the irqchip delays the servicing of irq
events if it finds a locked ioapic, and the
process_delayed_irq_events function should be called regularly
by the main thread in order to re-try servicing any delayed irq events.
Bug: chromium:1077058
Test: split irqchip runs all available x86-specific irqchip tests.
Also added some tests specific for the split irqchip. Ran these tests
and cargo test -p hypervisor -p devices
Change-Id: I14866645b86b3bf318440051069ff165e2cf9d88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2290192
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Added get/set_lapic_state functions to KvmKernelIrqChip and KvmVcpu.
Added tests for the KvmKernelIrqChip.
BUG=chromium:1077058
TEST=added associated tests for get/set_lapic_state
Change-Id: I0f1cebd9db370b5453a951f7827de511399cddf4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2260929
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Added an emum for MPState, and functions to translate between MPState
and kvm_mp_state. Added get_mp_state and set_mp_state functions to KvmVm
and the IrqChip interface.
BUG=chromium:1077058
TEST=added associated tests for get/set_mp_state
Change-Id: I0825f81b1b4d85884690606d691e8b88e8306ae1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2261293
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
In preparation of the KvmSplitIrqChip, moving tests out of the
irqchip::kvm module and into the irqchip::x86_64 module. This is because
the tests should be valid for any implementation of the IrqChipX86_64
trait.
Bug: chromium:1077058
Test: cargo test -p devices -p hypervisor
Change-Id: I57a15b275bce5e7d96f2736367b7aaef6b069fec
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2276322
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Modified ioapic implementation for the hypervisor abstraction layer.
This implementation has the same functionality and tests as the existing
one, but accepts a vec of resample_events instead of a GsiRelay. It also
takes a list of irqfds instead of creating them itself.
This will be used by the KvmSplitIrqChip, and will eventualy be modified
again to support an ApicBus when we want to support a UserspaceIrqChip.
Bug: chromium:1077058
Test: cargo test -p hypervisor -p devices
Change-Id: I306724266511a7975a25a34955651ea6f53e1c4c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2255303
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Copied and slightly modified pic implementation in the irqchip
submodule. It uses the PicState defined in the hypervisor crate and has
a register_resample_events function instead of a register_relay
function.
Some function signatures have been slightly changed to take &self and
&mut self where before they would take a PicState. This was done so
that the Pic struct itself would be the only object that needs access
to the resample_events rather than each PicState needing it's own copy
or clone.
This will later be used by the the KvmSplitIrqChip.
Test: cargo test -p devices -p hypervisor
Bug: chromium:1077058
Change-Id: Ia15ea1800b4339d3ad38d88d8ec6ace8ca5ea67a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2255302
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Vcpus are created on the Vm object, instead of with Vcpu::new. Vm keeps
a copy of the Hypervisor to support create_vcpu. Otherwise the methods
are the same as the kvm crate.
BUG=chromium:1077058
TEST=cargo test
Change-Id: I6fbd0e5fb5d81d4362a259e85eb392d8edbfff1f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2247366
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Richman <srichman@google.com>
Implemented the remaining IrqChip trait functions for the
KvmKernelIrqChip, including register/unregister_irq_event and irq
routing functions.
Added some irqchip tests for setting irq routes and servicing irq lines.
Also added tests for registering irq events.
BUG=chromium:1077058
TEST=cargo test -p devices -p hypervisor
Change-Id: Ia04c927b663ebdcacc88bc61d746077aa5b02514
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2246648
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Split the KvmKernelIrqchip struct definition and constructor between
x86_64 and aarch64 because aarch64 has an extra fd for the vgic device.
Constructor on x86_64 simply calls create_irq_chip while aarch64
constructor needs to call create_device and configure that device.
Also needed to split the try_clone implementation because the structs
have different fields.
Bug: chromium:1077058
Test: ran build_test, but I haven't been able to actually run the tests
on aarch64
Change-Id: I20e81a7ccedaf077d682055717caf05a94d54423
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2239976
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Implemented get/set_pic/ioapic/pit functions for the KvmKernelIrqchip.
Added respective functions on KvmVm for interacting with the underlying
KVM API.
Added associated tests for get/set functions.
BUG=chromium:1077058
TEST=ran devices tests and added get/set function tests
Change-Id: I66a29828fe2f1fbdf54d7325656a003ac09e36d0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2219422
Reviewed-by: Udam Saini <udam@google.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
This trait handles the x86-specific features of an irqchip, including
getting and setting the state of the pic, ioapic, lapics, and pit.
Also includes an empty implementation of this trait for the
KvmKernelIrqChip.
BUG=chromium:1077058
TEST=cargo test -p devices
Change-Id: I36034661f4a2baedc7ac2b8f311cab6327afefba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2197717
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
This new module contains the irqchip trait and it's implementations. The
irqchips will work with the new hypervisor crate to abstract the
interaction between crosvm and kvm.
This just defines the irqchip trait and an empty implementation of the
KvmKernelIrqChip.
BUG=chromium:1077058
TEST=added test for creating a KvmKernelIrqChip and adding a Vcpu to it
Change-Id: Ic1609c965e0a057f5a9d4d74f1cae46edb46dcb4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2197398
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
