Commit graph

331 commits

Author SHA1 Message Date
Dennis Kempin
4fea399df9 Reformat imports
crosvm is switching the import style to use one import per line.
While more verbose, this will greatly reduce the occurence of merge
conflicts going forward.

Note: This is using a nightly feature of rustfmt. So it's a one-off
re-format only. We are considering adding a nightly toolchain to
enable the feature permanently.

BUG=b:239937122
TEST=CQ

Change-Id: Id2dd4dbdc0adfc4f8f3dd1d09da1daafa2a39992
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3784345
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
2022-07-28 00:15:50 +00:00
Steven Richman
e3259f6319 kernel_loader: load elf32 images
Loading 32-bit images is needed for kvm-unit-tests.

BUG=b:233317135
TEST=boots, new unit tests

Change-Id: I6ba63255e0e2993f3735ef81489f64dbd0bb6374
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3764465
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Auto-Submit: Steven Richman <srichman@google.com>
Tested-by: Steven Richman <srichman@google.com>
Commit-Queue: Steven Richman <srichman@google.com>
2022-07-26 16:10:07 +00:00
Junichi Uekawa
fa0370918f crosvm: Make ProxyDevice to be safer.
Do not use a reference when it's not safe to call minijail.fork() multiple
times.

BUG=b:238646369
TEST=build

Change-Id: I91def471ef64ef11ba32032ccc095d5282362d62
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3779079
Reviewed-by: Noah Gold <nkgold@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: Junichi Uekawa <uekawa@chromium.org>
2022-07-25 05:44:36 +00:00
Mike Gerow
0c49f872a1 devices: add pflash to provide NVRAM for OVMF
This change adds a pflash implementation similar to the the one QEMU
has[1] for the purpose of giving OVMF a place to store BIOS settings and
UEFI variables. Unlike the QEMU version, though, this one only
implements the parts that OVMF relies on[2], and is therefore much simpler.

[1]: https://github.com/qemu/qemu/blob/HEAD/hw/block/pflash_cfi01.c
[2]: https://github.com/tianocore/edk2/tree/master/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c

TEST=tools/presubmit --all; boot VM under OVMF and confirmed UEFI
variables can be set and are persistent
BUG=b:238344840

Change-Id: I83bebb57006f39c6f0eb7ee4986c6af0e64de0bc
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3764374
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Mike Gerow <gerow@google.com>
Commit-Queue: Mike Gerow <gerow@google.com>
2022-07-21 23:17:32 +00:00
Vikram Auradkar
2314c4701b crosvm: Fix drift
BUG=b:213146388
TEST=presubmit

Change-Id: I59e6b7ad7aff8d4659c62e310a7955146a10d743
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3777405
Tested-by: Vikram Auradkar <auradkar@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
Auto-Submit: Vikram Auradkar <auradkar@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
2022-07-21 23:13:18 +00:00
Daniel Verkamp
967e30e0fc windows: adjust import paths and Cargo.toml deps
Fill in some of the missing imports and adjust the ones with paths that
differ in upstream crosvm.

This change was tested by removing crosvm from WIN64_DISABLED_CRATES in
tools/impl/test_config.py. Some dependencies are still missing, so the
crosvm bin crate does not fully compile yet.

BUG=b:213146388
TEST=run_tests --build-target=mingw64

Change-Id: I112e1db8bf34eed9fba7e539ce8ec84318acd291
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3777070
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Noah Gold <nkgold@google.com>
2022-07-21 17:19:50 +00:00
Vikram Auradkar
7110ddc62b x86_64: build and test on windows
BUG=b:213149155
TEST=presubmit

Change-Id: I15d217ffd355563b839bf4d7b0d0a19e01666060
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3774497
Auto-Submit: Vikram Auradkar <auradkar@google.com>
Tested-by: Vikram Auradkar <auradkar@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
2022-07-19 23:55:49 +00:00
Noah Gold
637b1ee1d1 arch: split platform lib code into sys mod.
Highlights:
* goldfish battery never worked on Windows, but it sort of compiled
  anyways downstream. This CL makes it unix only because it never worked
  on Windows as a device anyway.

BUG=b:237597358
TEST=builds

Change-Id: Ia5fc3b5e5fcd243d8454646b00a6857085d018ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3741432
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
2022-07-14 00:08:33 +00:00
Daniel Verkamp
970811a704 hypervisor: x86: remove apic_base and interrupt_bitmap from Sregs
These are only used in KVM, not the other x86 hypervisors, and they
don't really fit into the same category as the rest of Sregs. The
apic_base can be set via set_msrs(), and the interrupt_bitmap is
part of the irqchip state.

To enable this removal, we change the KVM set_sregs() call to retrieve
the current state and use the existing apic_base and interrupt_bitmap.

BUG=b:237095693
TEST=Boot x86-64 kernel on KVM

Change-Id: I275eec83b74f1c364b7a543882f3ac5960201143
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3728988
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Reviewed-by: Vaibhav Nagarnaik <vnagarnaik@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Noah Gold <nkgold@google.com>
2022-07-07 23:24:09 +00:00
Daniel Verkamp
0367dadf7f x86_64: pass Sregs via vcpu_init
Now that we have a Default implementation of Sregs that sets the
architecturally defined reset values, we can initialize the Sregs values
during build_vm(). This allows removal of the set_reset_vector()
function, as all of the values it set are now the defaults in Sregs and
Regs.

This also lets us set up the page tables and GDT only once during
build_vm() instead of rewriting them for every configure_vcpu() call.

This allows consolidation of the BIOS and non-BIOS configure_vcpu()
code.

BUG=b:237095693
TEST=Boot x86-64 Linux kernel
TEST=Boot --bios u-boot.rom

Change-Id: Ief19f983fd252dffa668ff2cfe96a64298e06cf2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723802
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-07-07 23:24:08 +00:00
Daniel Verkamp
0cba994f32 x86_64: expose setup_sregs steps as pub
This will be used to move the page table initialization out of the
per-vcpu setup in an upcoming commit.

The names of the individual steps are a slight improvement over the
previous setup_sregs() as well, since that doesn't really say what it
does in any detail.

BUG=b:237095693
TEST=Boot x86-64 Linux kernel
TEST=cargo test -p x86_64

Change-Id: Ifecf00107d923d0c37389956a1b006fe370e2591
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3735641
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Noah Gold <nkgold@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
2022-07-07 23:24:07 +00:00
Daniel Verkamp
91a4b090da hypervisor: x86_64: add Default impl for Sregs
Replace the Sregs Default implementation with one that provides the
register values at reset, based on the Intel software developer
manual.

The x86_64 tests need to be adjusted to only check the CR0 bits they
intend to match, since the default Sregs value now includes other set
bits.

BUG=b:237095693
TEST=Boot x86-64 Linux kernel
TEST=cargo test -p x86_64

Change-Id: If966941df43225572e79ebd9213671348e2846f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3735640
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-07-07 23:24:06 +00:00
Daniel Verkamp
814114c64c x86_64: call set_lint() for BIOS as well
This configures the IRQ chip and is not called anywhere else for the
normal BIOS path, so it should be moved above the `if has_bios` check.

BUG=b:237095693
TEST=crosvm run --bios u-boot.rom --disk test.img # virtio-blk works

Change-Id: I1813d59d7921a824c46a49de98d272f639cc5c07
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723801
Reviewed-by: Steven Richman <srichman@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
2022-07-07 23:24:04 +00:00
Daniel Verkamp
ad3914cd9a x86_64: move MSRs to vcpu_init
The MTRR-related MSR setup is split out into its own pub function for
clarity and to allow future reuse. The maximum variable MTRR check is
split out so we can generate MTRRs before having a valid VCPU object.

This unifies the MSR set calls in configure_vcpu() so that the BIOS and
non-BIOS cases use the same code.

BUG=b:237095693
TEST=Boot x86-64 Linux kernel
TEST=Boot x86 u-boot.rom

Change-Id: Ifa0020257a043190de69b7192c2d6b35c01d216e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723800
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-07-07 23:24:02 +00:00
Daniel Verkamp
e30f4fda83 x86_64: move Fpu initialization to vcpu_init
Implement Default for Fpu to initialize the floating point registers to
their officially documented reset values, and use the default Fpu values
to initialize all VCPU floating point state.

These are the same values as used in the previous setup_fpu() function,
so there is no change in behavior. (We now set the FPU state for both
BIOS and non-BIOS, but since the FPU values should match the ones used
at CPU reset, it should not cause any actual behavior change.)

BUG=b:237095693
TEST=boot x86-64 Linux kernel

Change-Id: I4eb656822d8fa4730203970aee178043c19af9ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723799
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-29 18:14:51 +00:00
Daniel Verkamp
1b7d5b8fba arch: provide one vcpu_init per vcpu
Rather than having a single vcpu_init instance that is used for all
VCPUs, make vcpu_init into a Vec so it can store different initial state
for each VCPU. This allows us to set up e.g. bootstrap processor state
differently than other processors, and it also means that the VcpuInit
struct doesn't need to be Copy.

BUG=b:237095693
TEST=Boot Linux with >1 CPU

Change-Id: I0ebfdc2dbd84d0817e3f75c2c852e4320b9e77c5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723798
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-06-29 18:14:49 +00:00
Noah Gold
4ea25d1e33 x86_64: add TSC leaf synthesis.
There have been two evolutions of providing the TSC cpuid leaf
(aka 0x15) to the guest.

a) For CrosVM on Windows, we have been providing the leaf
   unconditionally.  Furthermore, we've not been using the
   exact host leaf; instead, we calibrate the TSC frequency
   and provide that value in the leaf. This was done because
   the actual cpuid leaf values are not as accurate as
   we needed them to be to drive a guest clocksource.

b) In CrosVM mainline, 4080aaf9b3
   introduced the flag enable_pnp / enable_pnp_data, and
   provides the exact host 0x15 leaf to the guest if the
   flag is enabled.

This CL adds a new hypervisor capability (CalibratedTscLeafRequired) to control
whether or not the calibrated TSC leaf should be used, in addition to a new CLI
option to force it on hypervisors where it isn't enabled by default. The new
option is `--force_calibrated_tsc_leaf`.

BUG=b:213152505
TEST=builds upstream, battletested downstream on WHPX.

Change-Id: I611422808a9e10578c0ddcbd211ae902f937685f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3698993
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-06-28 02:23:55 +00:00
Daniel Verkamp
b4244d3952 kernel_loader: load ELF kernels at the right paddr
Previously, we were loading ELF kernels at the provided kernel_start
address plus the p_paddr (physical address) field of each program
header. This resulted in the kernel being loaded after a big gap of
zero bytes, which accidentally worked on x86_64 because 0x00 0x00
encodes a valid instruction, and the entry point was at the beginning of
the first section, so execution would effectively "nop slide" its way
from the supposed entry point all the way to the actual beginning of the
correct code. In addition, the Linux kernel entry point is compiled as
position-independent code, so the mismatched address did not matter.

Fix this by loading ELF kernels at whatever physical address they
specify, without adding any extra offset. The load_kernel() function
still accepts a start address, but this is now used simply to verify
that the ELF file does not try to load any sections outside of the
desired kernel region.

As a demonstration, we can look at the instructions at the kernel's
declared entry point (0x1000000 for a normal x86-64 Linux kernel in ELF
format) by attaching to the gdb stub and running:

   (gdb) disas 0x1000000,+8

With the old behavior, we get purely 0x00 0x00 opcodes, decoding as:
   0x0000000001000000:  add    BYTE PTR [rax],al
   0x0000000001000002:  add    BYTE PTR [rax],al
   0x0000000001000004:  add    BYTE PTR [rax],al
   0x0000000001000006:  add    BYTE PTR [rax],al

With the new behavior, we get the correct entry point instructions:
   0x0000000001000000:  lea    rsp,[rip+0x1203f51]        # 0x2203f58
   0x0000000001000007:  lea    rdi,[rip+0xfffffffffffffff2] # 0x1000000

BUG=b:234155022
TEST=cargo test -p kernel_loader
TEST=Boot x86-64 ELF vmlinux kernel

Change-Id: Iae4c8db022674e6311e54dffe479a1ed430a1ef4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673612
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anton Romanov <romanton@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
2022-06-23 22:30:37 +00:00
Daniel Verkamp
102d03b380 x86_64: return kernel load address from load_kernel
This will be used in a follow-up commit to set the initial instruction
pointer register.

BUG=b:234155022
TEST=tools/presubmit

Change-Id: I3a75f3929beb9e7dbccea0a0d245cf0bfebfe99f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673614
Reviewed-by: Anton Romanov <romanton@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
2022-06-23 22:30:36 +00:00
Daniel Verkamp
b5dbe329be x86_64: pass initial registers in VcpuInit
This allows passing the entry point of the kernel as the initial
instruction pointer value to each vcpu initialization call.

BUG=b:234155022
TEST=Boot vmlinux ELF kernel on x86-64

Change-Id: I6e7bd710ff304601dc6ec56acc0380cbef72c055
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3711619
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-23 22:30:34 +00:00
Daniel Verkamp
569a96bed8 hypervisor: x86_64: impl Default for Regs
Replace the automatically derived Default with a manual implementation
so we can set bit 1 of the flags register to 1. This is architecturally
defined to be an always-1 bit (for reasons dating back to 8080/8085
source-level compatibility on the 8086), so we should not create a value
where bit 1 isn't set.

BUG=b:234155022
TEST=tools/presubmit

Change-Id: I7835e5a04385654a667b55e2e2ea2121b5807288
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3717524
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-23 22:30:32 +00:00
Junichi Uekawa
3349a67660 crosvm: Add a first filter_cpuid test.
Now that we're trying to change how we copy cpuid, let's add a way to
test them.

BUG=None
TEST=tools/dev_container cargo test -p x86_64 --features=direct

Change-Id: Ic5f1a59b6f0bcda809b908ba2e852e8b03e037a2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3716013
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-06-23 22:17:15 +00:00
Junichi Uekawa
6af7ff8540 crosvm: Pass down CpuidResult instead.
So that a copy becomes a straightforward copy.

We were copy-pasting eax ebx ecx edx many times here.

BUG=None
TEST=build

Change-Id: Ibdabdd0da3876159bda3d29aa2a3927b9a3f40ae
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3717927
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
2022-06-23 22:17:13 +00:00
Noah Gold
dd40d069b2 x86_64: cross platform cleanup
* Splits platform specific bits of test_integration into a sys module.
* Cleans up Cargo.toml & platform specific imports.

BUG=b:213152505
TEST=builds

Change-Id: I95eff1f240e98b09a600239a77fc54e5222edebf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3701040
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Richard Zhang <rizhang@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
2022-06-22 23:34:17 +00:00
Daniel Verkamp
8cac16bf75 kernel_loader: return a struct for better naming
The new LoadedKernel structure also splits out the size and end address,
which are both used in different places (x86_64 wants end, aarch64 wants
both).

BUG=b:234155022
TEST=tools/presubmit
TEST=cargo test -p kernel_loader

Change-Id: I86a7e412c983f29a2c614cc9e6896aa11db6ba94
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673611
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
2022-06-21 19:39:40 +00:00
Junichi Uekawa
3d6c9542a7 crosvm: Reland "crosvm: split up --no-legacy flag"
This is a reland of commit 7110d673f2

Replace --no-legacy flag, which implied the removal of both i8042 and
rtc devices, with separate --no-i8042 and --no-rtc flags. The old
flag is still supported and implies the other two.

Because the original landing of this flag didn't protect it as an x86
specific option, this change just leaves that alone. But the new flags
are added as x86-only, because they are very x86 specific.

BUG=b:223443221
TEST=crosvm run --bios u-boot.rom --disk kernel
TEST=boot volteer-manatee

Change-Id: I57f9328483f24da29db663e261b3ccc2a97c3239
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3715083
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-21 17:59:38 +00:00
Junichi Uekawa
7e7412a86f Revert "crosvm: split up --no-legacy flag"
This reverts commit 7110d673f2.

Reason for revert: Needs to preserve --no-legacy flag for a while though deprecated

Original change's description:
> crosvm: split up --no-legacy flag
>
> Replace --no-legacy flag, which implied the removal of both i8042 and
> rtc devices, with separate --no-i8042 and --no-rtc flags. The old
> flag is still supported and implies the other two.
>
> Because the original landing of this flag didn't protect it as an x86
> specific option, this change just leaves that alone. But the new flags
> are added as x86-only, because they are very x86 specific.
>
> BUG=b:223443221
> TEST=crosvm run --bios u-boot.rom --disk kernel
>
> Change-Id: I4bbea2d0a38fdd3a5d69d12ca79fa360f0460358
> Signed-off-by: Alistair Delva <adelva@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3510982
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
> Tested-by: kokoro <noreply+kokoro@google.com>

Bug: b:223443221
Change-Id: I022cff96f4508713c15973ee37a57e7fdc8c14e3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3715073
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
2022-06-21 01:46:58 +00:00
Daniel Verkamp
77abcb0d0a arch: add VcpuInit data to provide initial values
This will be used to pass the initial register values for each vcpu.
Each architecture can define its own variant of the initial vcpu state.

BUG=b:234155022
TEST=tools/presubmit --all

Change-Id: I696a5ecda202c1ff0681f0b89b89b9eec11e27e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673615
Reviewed-by: Anton Romanov <romanton@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-17 20:50:51 +00:00
Vaibhav Nagarnaik
b8bfdb496f irqchip: Add IrqEventSource for each event
This allows irq processing thread to log statistics and metrics and
track them using the source of the device. To be upstreamed later.

Introduce `PCI_VENDOR_ID_CROSVM` which identifies devices created by
crosvm. And introduce `CrosvmDeviceId` which adds a unique device ID for
each type of crosvm device.

BUG=b:213149158
BUG=b:213152505
TEST=Compiled.

Change-Id: Ica1374d8a2d8fd627c9397553bb7fb62baeaff7d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3687418
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vaibhav Nagarnaik <vnagarnaik@google.com>
2022-06-17 18:44:20 +00:00
David Stevens
a4a46df15e x86_64: fix e820 computation
Exclude pci mmio region below 4gb from the e820 table. This is a
followup to CL:3696671.

BUG=None
TEST=arc.Boot.vm

Change-Id: I07c2b9a9e2e4e27682c4b60406625b019eea195f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3708390
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
2022-06-17 09:15:19 +00:00
Keiichi Watanabe
2dcbb98677 x86_64: Fix build errors with direct feature
Make `cargo test --feauture=direct` pass by fixing build dependencies
and skipping a broken test case.

BUG=b:220292205
TEST=cargo build --features=direct in x86_64

Change-Id: I599ad5bc7ebb2fa91f6ff64291fb15ea129f8d05
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3708381
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
2022-06-17 06:21:18 +00:00
Daniel Verkamp
fb641f67e4 resources: introduce AddressRange type
The AddressRange type is used for representing contiguous memory or I/O
address ranges, mostly equivalent to RangeInclusive<u64> but with the
added benefit of implementing Copy and not carrying an extra field used
only for iteration, which we don't need.

Using an inclusive range means we can represent the full address space
with no weird corner cases around the upper limit of the range (for
example, an AddressRange covering the full 64-bit space can be
represented as start: 0, end: u64::MAX).

AddressRange also replaces the previous MemRegion type, which was a
start/size pair.

This normalizes the interface of the resources crates to use
AddressRange rather than a start/size pair; more cleanups throughout the
tree may be possible, but this commit attempts to be somewhat smaller to
have a hope of being reviewable.

BUG=b:222769529
TEST=tools/presubmit --all
TEST=cargo test -p resources

Change-Id: I8c90bdc28456221b5107ef7e589233315ea739c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3696671
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-16 20:29:26 +00:00
Alistair Delva
7110d673f2 crosvm: split up --no-legacy flag
Replace --no-legacy flag, which implied the removal of both i8042 and
rtc devices, with separate --no-i8042 and --no-rtc flags. The old
flag is still supported and implies the other two.

Because the original landing of this flag didn't protect it as an x86
specific option, this change just leaves that alone. But the new flags
are added as x86-only, because they are very x86 specific.

BUG=b:223443221
TEST=crosvm run --bios u-boot.rom --disk kernel

Change-Id: I4bbea2d0a38fdd3a5d69d12ca79fa360f0460358
Signed-off-by: Alistair Delva <adelva@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3510982
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-06-15 22:27:40 +00:00
Masami Hiramatsu
eb83ee79b6 aarch64: Add Goldfish battery to aarch64 crosvm
Add Goldfish battery to aarch64 crosvm. The guest kernel will
see the goldfish battery node on the FDT.
This copies the seccomp policy for the battery from x86-64.

BUG=b:214124318
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
TEST=android-sh -c 'dumpsys battery'
TEST=tast run ${DUT} arc.PerfBoot.vm

Change-Id: I8212e760db5ffbc5d01442cfa7930baa5962ef6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3686713
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Masami Hiramatsu <mhiramat@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Masami Hiramatsu <mhiramat@google.com>
2022-06-15 02:46:45 +00:00
Vaibhav Nagarnaik
ed632b56a8 cpuid.rs: Fix Formatting
From the change https://crrev.com/c/3690369, some unexpected indentation
happened which rustfmt didn't/couldn't catch.

Fix the whitespacing.

Test: NA
Change-Id: Ic8bd80a9c72b8d57b9131ba7e37165dba934bc8a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3703224
Reviewed-by: Noah Gold <nkgold@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vaibhav Nagarnaik <vnagarnaik@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-06-13 20:53:54 +00:00
Noah Gold
c7ddaec446 x86_64: refactor cpuid passthrough code.
Reworks the way we organize parameters to this module, and
adds CPU manufacturer detection.

BUG=213152505
TEST=builds

Change-Id: Ibb96f08cacbdfdaff5ef971c3d6d7b901b5d73fa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3690369
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Noah Gold <nkgold@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-06-10 23:43:02 +00:00
Noah Gold
157bd6f04d x86_64: reset msrs when using bios
Our BIOS doesn't set the TSC MSR to 0 on boot, but our hypervisors need
this to be set so they can correctly sync their TSC offsets. This
introduces a generic "reset_msrs" function where we currently reset the
TSC msr, but where we could also reset if we need to in the future.

Cherrypick from downstream branch.
Actual author: Colin Downs-Razouk <colindr@google.com>.

BUG=191981229
TEST=tested downstream

Change-Id: I17b5709411394ae48fb5d7310636636295ebfaad
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3690370
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Noah Gold <nkgold@google.com>
2022-06-07 02:19:06 +00:00
Junichi Uekawa
af9d617e2d crosvm: Simplify Msr set up loop and MsrFilter.
Name the enums instead of bool so that it's easier to reason, and factor
out the MSR loop.

BUG=b:229770963
TEST=build

Change-Id: I7d2306472bdf7482479b40b0ef00f378754a811f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3685671
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-06-03 00:00:04 +00:00
Dapeng Mi
4080aaf9b3 crosvm: expose cpu frequency and temperature CPUID bits to guest
Turbostat detects if CPU frequency and temperature features are
supported by reading several CPUID entries bits. Expose these
CPUID bits to guest when enable-pnp-data option is enabled.

Several MSR registers which turbostat depends on have been already
passed through when ITMT is enabled. Adding code to detect this and
avoid to doubly pass through.

BUG=b:229770963
TEST=Run "turbostat" in Chrome OS guest and show correct value.

Change-Id: Ieebaf616d544cb187a80ec6f3313a246ebf54bb2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3641466
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-31 02:03:38 +00:00
Dapeng Mi
a5d52312d5 crosvm: implement KVM_X86_SET_MSR_FILTER ioctl
turbostat shows cpu freq/c-state/thermal statistics data by reading
some related MSRs. Unfortunately some MSRs such as MSR_IA32_POWER_CTL
are already emulated by KVM. The emulated value are not what we want
to expose to Chrome OS guest. KVM_X86_SET_MSR_FILTER ioctl provides
a way to skip KVM's emulation and let user space handle the MSR.

We added two MSR actions "MsrPassthroughFilter" and "MsrEmulateFilter"
to indicate the corresponding MSR needs to be filtered.

BUG=b:229770963
TEST=Run "turbostat" in Chrome OS guest and show correct value.

Change-Id: I5920ddba091589170dc326e10187aec66f75df79
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3641465
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-30 06:35:12 +00:00
Mike Gerow
539ba3dcc9 Reland "devices: debugcon: add bochs-style debugcon device"
This is a reland of commit 129840471d

Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>

Bug: b:233610263
Change-Id: I2f2125da95e8907f4f0c16930952e9b765d33e6c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671087
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-05-26 19:25:02 +00:00
Mike Gerow
d46572f47e Revert "devices: debugcon: add bochs-style debugcon device"
This reverts commit 129840471d.

Reason for revert: This conflicts with https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3600167 breaking the build

Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>

Bug: b:233610263
Change-Id: Ia70540c3041611f59968cb7929b238eecfe2530d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671082
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
2022-05-26 18:23:30 +00:00
Mike Gerow
129840471d devices: debugcon: add bochs-style debugcon device
This allows for creating a simple write-only debug connection that uses
a single IO port. This method is supported by both bochs and qemu[1].

The main motivation here is to help in improving crosvm's ability to
boot OVMF, which makes use of this simple debug device on port 0x402.
For that one would use `--serial
type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.

Note that serde_keyvalue doesn't support parsing hex values, hence the
need to use `1026`, but I intend to address that as well to allow the
more natural `debugcon_port=0x402` phrasing.

[1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c

BUG=b:233610263

Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Mike Gerow <gerow@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-26 17:13:59 +00:00
Daniel Verkamp
337d123007 x86_64: gdb: add support for FPU and SSE registers
BUG=None
TEST=connect gdbstub and run `info all-registers`

Change-Id: I2800134923d73117122b0cb136021d30ebe4cd76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3657060
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-05-25 17:33:30 +00:00
Noah Gold
ebb6efe266 x86_64: set reset vector when using bios
BIOS expect all the cpus to be pointed at the i386 reset vector before
boot. We can't guarantee that a fresh vcpu will be pointed to the reset
vector by default, so we should set the reset vector when we're
configuring the vcpu when we're using a BIOS.

Cherrypick from downstream branch.
Actual author: Colin Downs-Razouk <colindr@google.com>.

TEST=builds
BUG=b:213152505

Change-Id: Idf4e0a200c8141adf5cbb83856cbd57362d84716
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3657811
Reviewed-by: Colin Downs-Razouk <colindr@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Noah Gold <nkgold@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-20 21:06:04 +00:00
Vineeth Pillai
81b5e616d6 crosvm: vm_events: consolidate vm events into one framework.
crosvm waits on events like exit, reset, crash, guest panic etc and
uses eventfd to wait on these events. As of now, we have 4 eventfds
and may increase.

This is an attempt to consolidate all Vm events into one framework.
Use Tube instead of Event to get consistent behavior between OSes.
Implement a wrapper over Tube to have a consistent API for events.

BUG=None.
TEST=Built crosvm. Ran a minimal vm to panic and verified that crosvm
received the panic event. cargo test on devices.

Change-Id: I313d428de5e3ce3b879982f913918ec0a4a72c35
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3480577
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vineeth Pillai <vineethrp@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
2022-05-20 18:04:21 +00:00
Junichi Uekawa
6f2996bdde crosvm: Iterate over list of MSRs.
Instead of calling method each time, prepare a list and then iterate
over so that it's clearer we are doing the same thing many times.

BUG=b:215297064
TEST=build

Change-Id: I2556a9c12baa90ac0e5fa98e488e0586b1a4f010
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3653341
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-05-20 00:31:59 +00:00
Junichi Uekawa
e96813e469 crosvm: reorganize MsrRWType.
To simplify the construction and parsing, and put the impossible values
checking at parameter parsing time.

BUG=b:215297064
TEST=build

Change-Id: Ic601d61a73dba9e3ec40f3589c62a586e1c7a8c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3655032
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-05-20 00:31:59 +00:00
Vaibhav Nagarnaik
8c126493ad hypervisor: Add capability for early CPUID initialization
Some hypervisors (e.g. whpx) require that VM need to initialize their
`CPUID` early i.e. during VM creation. In this case, there is no
per-vcpu initialization of `CPUID`.

Allow this quirk through another entry in `VmCap` that avoids `CPUID`
initialization at vCPU creation time.

BUG=b:213150327
TEST=Compiled.

Change-Id: Ia74434ead1fff244042d03347c82cb73f243bdbb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3654206
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vaibhav Nagarnaik <vnagarnaik@google.com>
2022-05-20 00:15:25 +00:00
Xiong Zhang
8c97db443b x86_64: Add parameter to specify pci low mmio start address
In order to let host and guest have ths similiar pci mmio layout in
manatee, this commit add a pci-start parameter.

BUG=b:197877871
TEST=boot vm with --pci-start and check vm's mmio layout

Change-Id: I0e83dfb3ab3c3b2ea1b0a1554d532e8414924b36
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3578017
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
2022-05-19 07:47:18 +00:00