Since PciRoot has been modified into Arc<Mutex<>>, RunnableLinuxVm->root_config
could be changed from PciConfigArch to PciRoot also, this could simplify code
and reduce two functions from PciConfigArch.
BUG=b:197877871
TEST=tools/presubmit
Change-Id: Ibc18587900d6f8259ac1d6f8fe7b3ea4fedad07e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305942
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Instead of returning 0 for both shutdown and reset/reboot, let's have
shutdown continue returning 0, but reset will now return 32 exit code,
so that callers will have an option to handle this case differently.
BUG=b:3169569
TEST=Examine crosvm exit codes when resetting and shutting down VM
Change-Id: I2c7c11b7f8c8528744f7e25e5d17c6fa9810f409
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3316835
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
Reserved 64MB mmio space for pcie enhanced configuration access,
and added it into mmio_bus with PciConfigMmio.
Now pci_root will be added into PciConfigIo and PciConfigMmio, so
Arc<Mux<pci_root>> is used.
BUG=b:197877871
TEST=tools/presubmit
Change-Id: Ic90a4cc3dfb00b09358478e129cc8a16e91012c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305941
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
In pcie enhanced configuration access, register bit number is 12, in order to
support such PciConfigAddress, this commit make register bit number
variable, it could be 8 or 12 decided by caller.
BUG=b:197877871
TEST=tools/presubmit
Change-Id: I96a317896b9536742534bee86f0e8f1acc323292
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305940
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
PcieRootPort implement hotplug_bus trait, it should be added into
RunnableLinuxVm->hotplug_bus, so create pcie root port when
RunnableLinuxVm->hotplug_bus is ready.
Many hotplug bus may exist, when a hotplug device is added, is_match()
should be called on each hotplug bus before attach that device to
the bus.
BUG=b:185084350
TEST=Boot a vm with passthrough device and check its function
Change-Id: I89dbc091f336b3f9d0435b52963f7cf62d408a67
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2955570
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Extend the ABI in protected mode to provide the protected VM firmware
with the size of the loaded image by using register x2.
BUG=b:203505371
TEST=presubmit
Change-Id: Ib01b88dcce2f3fbfba759599d7fce9de62de720c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3259937
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This currently gives a compiler warning:
warning: dereferencing a null pointer
--> aarch64/src/lib.rs:71:19
|
71 | unsafe { &(*(0 as *const $str))$(.$field)* $([$idx])* as *const _ as usize }
| ^^^^^^^^^^^^^^^^^^^^^ this code causes undefined behavior when executed
...
622 | arm64_core_reg!(pc)
| ------------------- in this macro invocation
|
= note: this warning originates in the macro `offset__of` (in Nightly builds, run with -Z macro-backtrace for more info)
Fix the UB with an implementation based on memoffset::offset_of and
addr_of_mut! instead.
BUG=none
TEST=`emerge-kukui crosvm` no longer complains about UB
Change-Id: I0ab55dc7527c3a4acffe02ee587742dbddd45a0f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3270099
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Use the anyhow crate to provide ad-hoc errors with context. This removes
the large, manually-updated enum, which we never use programmatically
anyway (error messages are printed in human-readable form and otherwise
not matched against).
BUG=b:190433480
TEST=cargo build
TEST=./test_all
Change-Id: Ia7b90b33774d4031054b346d650861d3105044ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3105436
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
This change contains the results of running
./tools/contib/cargo_refactor.py
This will break the next uprev, and needs to be synchronizized
with the corresponding ebuild changes in https://crrev.com/c/3248925
BUG=b:195126527
TEST=./tools/run_tests
Change-Id: Ied15a1841887bb8f59fba65b912b81acf69beb73
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3248129
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
At present the Guest generates its own CPU topology. To mitigate
cross-hyperthread speculative execution side channel attacks, allow
Guest to use mirror CPU topology of Host is needed for future scheduling
optimization.
Add a config option "--host-cpu-topology" to ask the vCPU number to be
identical to physical CPUs, and make the vCPU has the same APIC ID in
MADT and CPUID as the corresponding physical CPU. The same APIC ID can
ensure the same topology.
"--host-cpu-topology" requires vCPU number must equal to pCPU number,
and it has the default vCPU number setting, which equals to pCPU number.
"--host-cpu-topology" also defaultly sets CPU affinity for each vCPU to
the pCPU which has the same processor ID, like 1=1:2=2:3=3:4=4, so that
the vCPU and its corresponding pCPU will have the same processor ID and
the same APIC ID. User can't set CPU affinity if "--host-cpu-topology"
was set.
BUG=b:197875305
TEST=Set "--host-cpu-topology" option and check Guest's /proc/cpuinfo,
lscpu, CPUID for different vCPU
Change-Id: Ibc4eb10649e89f43b81bde6d46d6e0e6c7234324
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3217035
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
With vfio pci device hotplug, bus->devices will be inserted and removed at
runtime in different vcpu threads, so mutex should be used to protect it.
Both each vcpu thread and pci_root share mmio_bus and io_bus, so use Arc
for mmio_bus and io_bus. But pci_root is inserted into io_bus for pci cfg io,
in order to resolve reference loop and memory leak, weak is used for
pci_root.mmio_bus and pci_root.io_bus.
BUG=b:174705596
TEST=boot a vm and check its function
Change-Id: I7b3e63db76a90bc3873619b4d80a66db741ce78f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3184724
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Platform device is another type of device which might be assigned
directly to VM by using the same IOMMU DMA isolation technique.
In contrary to PCI, platform device has no config space which
describes device resources and makes it self-contained and
self-discoverable. Therefore, platform device resources are described in
FW and host is the one who enumerates/probes devices by parsing DT/ACPI.
We have ioctl i/f which allows to expose all that info to VMM.
Add platform bus specific calls to interact with host properly and
plug in to aarch64 bus creation code.
Note, for now all IRQs are abstracted to wired line (SPI in ARM GIC world)
which means guest wont see MSI-X for platform devices.
BUG=b:185504618
TEST=trogdor64-manatee SDHCI and GENIQUP device passthrough boots/works
Change-Id: Id0e9efde3586af77ed1d0b8bf79ca485906afb83
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961216
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Commit-Queue: Micah Morton <mortonm@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
DT platform bus abstraction requires its own MMIO address range.
Let it allocate from well defined address range.
BUG=b:185504618
TEST=trogdor64-manatee SDHCI and GENIQUP device passthrough boots/works
Change-Id: I357e909433a565968a7f081c727a3b1e420e7729
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961212
Commit-Queue: Micah Morton <mortonm@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Before we call build_vm we are creating devices and there is no reason
to assume those have to be PCI only. In preparation for VFIO platform
device support, add super trait which allows to pass generic device
structure around and still be able get back to our original type.
BUG=b:185504618
TEST=manatee PCI device passthrough boots/works
Change-Id: I500f44af430f5f06299f20fc4ca17ca008a7e0c5
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961210
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Rather than duplicate the calculation, resuse the helper function that
calculates the entry address. This means there's just one place to make
changes and everything will be kept in sync.
BUG=none
TEST=presubmit
Change-Id: I2fd31dbaf2479ad0ce9d05c7341323b695268fa4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3111366
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Andrew Scull <ascull@google.com>
Add necessary kernel cmdlines for aarch64.
Adjust PCI address to make room for ramoops on aarch64.
Move the code from x86_64 to common places.
BUG=b:153934386
TEST=vm_pstore_dump
Change-Id: I8f92a7fd04a49afd7e8be9e7cf1901ef70b88d65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3103131
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Kansho Nishida <kansho@chromium.org>
Commit-Queue: Ryo Hashimoto <hashimoto@chromium.org>
Device implement HotPlugBus trait could notify hotplug event into
guest, and such device should be added into RunnableLinuxVm, so it
could be used at device plug in and plug out.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: I9497f61312582483090ff708d0f37b97d7303811
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954673
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
When a vfio pci device is added through hotplug in, it should be configured
at runtime and added into pci_root->devices tree, so pci_root is added
into linux.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: Ibcb5f4a849134f64fbceeac645bebd80d6ca72d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954672
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Move the definitions of SerialHardware, SerialParameters and SerialType
to the devices crate so that they'll be available for code in the
devices crate as well.
BUG=b:195495971
TEST=cargo test
Change-Id: Ieb711bdb18a8afdb28cac262a3355739604d4607
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3096439
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Protected VMs require all virtio data to be bounced through a memory
window shared between the host and the guest. Although this can be
achieved by forcing the guest to use swiotlb bouncing for all DMA
transfers, the recent introduction of "Restricted DMA" in Linux allows
these buffers to be sized and allocated on a per-device basis.
Remove the 'swiotlb=force' option when '--protected-vm' is set in favour
of describing a reserved memory region to be used as the swiotlb buffer
for all virtio-pci devices, adjustable via the new '--swiotlb' option.
BUG=b:190593703
TEST=cargo test on x86 and arm64 machines
Cc: David Brazdil <dbrazdil@google.com>
Cc: Claire Chang <tientzu@chromium.org>
Cc: Quentin Perret <qperret@google.com>
Cc: Andrew Walbran <qwandor@google.com>
Cc: Marc Zyngier <mzyngier@google.com>
Change-Id: I2d48a7c77740e7f3ad996ad33592f0acd53b7144
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3064198
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Will Deacon <willdeacon@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This flag is intended to be used to delay making a VM's RT VCPUs
RT until "make_rt" is called, in order to avoid boot time
regressions with RT.
BUG=b:142777321
TEST="grep policy /proc/<pid of rt vcpu>/sched" to make sure RT vcpu
isn't RT until "make_rt".
Change-Id: I1b9132e11f0acc626434c60cecc2f4afe350961a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2703224
Auto-Submit: Suleiman Souhlal <suleiman@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Suleiman Souhlal <suleiman@chromium.org>
The devices to be notified on resume are unrelated to the functionality
of Bus, which is looking up devices in an address space. Additionally,
each Bus instance had its own list of devices to notify, although in
practice, only the one in the I/O bus was used.
Move the resume_notify_devices list into RunnableLinuxVm instead.
BUG=None
TEST=Boot Crostini on x86 and arm
Change-Id: I72c629c6d6589c4a9350831c8a076c5c0c9f9aeb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3043489
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
In VT-d, the IOMMU hardware can translate guest physical address that
is no more than MGAW (Maximum Guest Address Width) which is reported
from the VT-d Capability register.
We pass this information to the guest IOMMU front driver so that it
can allocate appropriate IOVA.
VT-d indicates that "implementations must support MGAW at least equal
to the physical addressability (host address width) of the platform".
Thus we take the Physical Address Bits that is reported by
CPUID.80000008H as the minimum MGAW.
BUG=b:181736020
TEST=--vfio=/sys/bus/pci/devices/0000:00:14.0,iommu=on
Change-Id: I26a421ea2e7dd893d413d63ab313721cfdf0b5c1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2757278
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Stevens <stevensd@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: David Stevens <stevensd@chromium.org>
Move the call to enable_protected_vm past the PVTIME memory region
allocation introduced by 895c90c5f2 ("aarch64: Implement
ARM_VCPU_PVTIME for "stolen time" accounting"). As such allocation is
prohibited once protected VM mode has been enabled (Kernel returns
EPERM), which currently results in crosvm failing when started with
--protected-vm.
BUG=b:193231584
TEST=crosvm --protected-vm on a kernel with KVM_CAP_ARM_PROTECTED_VM
Change-Id: I2a97d3ff64ed59dd6679e51951c79e27bf290d5e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3021126
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
ARM supports paravirtual clocks or "stolen time" accounting by
allocating a page of memory in the guest memory map for a pvtime
structure and then sharing that address with the guest and updating it
in the host to tell the guest about how much time has been stolen from
the guest because the guest hasn't been running. Read all about it
here[1]. Add support to crosvm to allocate this page (for now a 64K size
chunk of memory that all VCPUs share access to) and then set the address
of the page in each VCPU when starting up.
[1] https://www.kernel.org/doc/html/latest/virt/kvm/arm/pvtime.html#stolen-time
BUG=chromium:1130828, b:169094241
TEST=emerge-trogdor crosvm && cros deploy $DUT crosvm && \
tast run $DUT crostini.Basic.buster_stable;
dmesg | grep pv # in the guest shows "steal time"
Change-Id: Ie3497bb22fb0e38eeff8ebac14b4213824bb6ca6
Disallow-Recycled-Builds: test-failures
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2871394
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
The --cpu-cluster option can be used to report a physical grouping of
CPUs in the device tree as a "cpu-map" node:
https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/topology.txt
Each instance of the --cpu-cluster option specifies a new group
consisting of a list of CPUs, and it may be repeated to add multiple
groups.
The --cpu-capacity option can be used to specify the relative
performance of CPUs so that the guest kernel's scheduler can make better
decisions on systems with heterogeneous cores (e.g. big.LITTLE).
--cpu-capacity units are left up to each architecture; for devicetree
systems, capacity is used to fill the cpu capacity-dmips-mhz (Dhrystone
benchmark MIPS per MHz) field in each cpu node:
https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/cpu-capacity.txt
For example, on a trogdor board, there are 6 little cores (0-5) with a
capacity of 452, and 2 big cores (6-7) with a capacity of 1024, which
results in a crosvm command line argument of:
--cpu-capacity 0-452,1=452,2=452,3=452,4=452,5=452,6=1024,7=1024
Currently, these options only have an effect on devicetree platforms and
are ignored elsewhere; they may be expanded in the future to fill in the
equivalent ACPI tables if systems with heterogeneous CPUs are used
there.
BUG=b:182198842
TEST=Start crosvm on kevin with --cpu-cluster options
TEST=crosvm run --cpu-cluster 0,1,2,3 --cpu-cluster 4,5
Change-Id: I59c466549ccd908f8eea1da0651d82716bc82972
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2762298
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
This will be used to dynamically add and remove bus ranges when the PCI
command register is updated to enable/disable memory and IO decode.
BUG=b:174705596
TEST=cargo test -p devices
Change-Id: I6bb175e0628bf598d049562700e2f55a2a62df59
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2689081
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
These parameters multiplied the number of type arguments to build_vm
unnecessarily and complicated the thread of execution in the programmers
head. Closures also complicate the borrow rules, making things much
harder to change.
This change uses the results of the closures (e.g. PCI devices, IRQ
chips) as parameters instead. The rest of this change follows naturally
from pulling on that thread until tests pass.
As a result of the removal of several type arguments, the code size was
reduced by ~100KiB on a 5MiB build.
BUG=b:185170486
TEST=./test_all
Change-Id: I6bcc5eb1b1f3031d4328bb4a81ddef618d04767b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2829136
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
A protected VM will have the PC set to the start of the firmware at boot
by EL2. Pass the address of the next stage to the firmware in x1.
BUG=b:175729255
TEST=cargo test
Change-Id: I8d5a2aae4e2790914e12358f52511c8f18b3d769
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2843605
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Andrew Scull <ascull@google.com>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
This requires exporting the memory layout from the arch crates, but it
does simplify the bloated build_vm interface a bit. It also will allow
for more fine-grained control the backing memory of GuestMemory.
TEST=test_all
BUG=b:183988204
Change-Id: Ie76755198d2fdc2a41bd538650939d6550686b88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2809434
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Zach Reizner <zachr@chromium.org>
This removes some unsafe code, improving the interface so that it cannot
be misused (e.g. previously, different Vec<u8> instances could be passed
to fdt functions that did not validate the contents).
The new implementation also adds some extra error checking to catch
invalid string values in all API entry points that accept strings, as
well as out-of-order node nesting that would result in DTB data that did
not conform to the spec.
BUG=b:175729255
TEST=cargo test -p arch
TEST=Boot Crostini on kevin (arm)
TEST=diff old and new dts from `dtc -I fs -O dts /proc/device-tree`
Change-Id: I567d562ed1b447aa0d282b68c71758edea13ffc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2713569
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
- Add an address space region for the protected KVM firmware.
- Query firmware size, mmap something that size and create a memslot.
BUG=b:163789172
TEST=cargo test
Change-Id: I054cf5d763c980d073c17bce70e85a781816b64d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2623942
Auto-Submit: Andrew Walbran <qwandor@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Only relocating FDT to the front of RAM if booting arm guest in BIOS mode.
ARCVM depends on the kernel and fdt placement at 0x80080000 and the end
of RAM respectively to boot correctly.
BUG=b:177926450
BUG=b:178427080
TEST=local boot of android virtual device on ARM host
Change-Id: I4c23bd2db63532ab3cc478627818322641b895bd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2686590
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Ram Muthiah <rammuthiah@google.com>
Commit-Queue: Ram Muthiah <rammuthiah@google.com>
Auto-Submit: Ram Muthiah <rammuthiah@google.com>
Reviewed-by: Alistair Delva <adelva@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
rutabaga_gralloc is a cross-platform, Rust-based buffer
manager.
The rationale for this change is:
1) For the {cross-domain, wayland} context type, we need to
have a good story for the crucial "wl-dmabuf" feature. As
minigbm has been thoroughly tested on ChromeOS and currently
powers the "wl-dmabuf" feature, it only makes sense for us to
have a path to minigbm for the cross-domain prototype. This
will be used by Sommelier.
2) While minigbm allocation works well on Chromebooks, it is
not sufficient for cross-platform purposes. For their Virtual
Graphics Interface (VGI) initiative, Android graphics
virtualization experts have expressed their desire for a Vulkan
based allocator. This will to go alongside cros_gralloc in
minigbm, which is considered by many to be the ""world's
premiere gralloc implementation".
3) Android graphics virtualization experts have expressed their
desire for vkMapMemory(..) to be used when crosvm is in
multi-process mode. Currently, only dma-buf mmap() is supported
for zero-copy blobs in multi-process mode. dma-buf mmap() is not
guaranteed to work on Nvidia (a "must have" for Cuttlefish) or
any other driver for that matter (we *make* it work for ChromeOS).
Possibly only solution: vkMapMemory ;-)
With these goals in mind, here's a summary of the revelant changes:
* Renamed the {gpu_allocator.rs, GpuMemoryAllocator trait} to be
{gralloc.rs, Gralloc trait}.
* Moved all GPU allocation out of the resources crate and into
the rutabaga_gfx crate. This will allow the resources crate to
be focused on managing resources for virtual machines.
* Moved the gpu_buffer crate into the gralloc module in the
rutabaga_gfx crate. The same functionality is now under
"minigbm.rs", "minigbm_bindings.rs" and "rendernode.rs"
* Added an optional dependency on vulkano.rs. vulkano.rs is a safe
Rust wrapper around the Vulkan api [a]. It's emphasis on type
safety makes a good fit for crosvm, though there are other high
quality crates out there (gfx-rs, ash.rs). Though development
has slowed down, it should satisfy goals (2) and (3) quite easily.
* Added a system_gralloc implementation based on memfd. This can be
used when minigbm or Vulkano features are not used, to replicate the
highly useful "wl-shm" feature in Sommelier. Astute observers will
note this can also enable seamless Wayland windowing without GPU
features for Android too. Some minor changes to the base crate were
needed.
* Cut down on the amount of DrmFormats to the subset needed by
Sommelier and cros_gralloc.
* Moved checked arithmetic into it's own file.
* Internally renamed to "wl-dmabuf" feature to be the "minigbm"
feature. This is because "wl-dmabuf" has a dependency on minigbm.
* Small rutabaga_gfx cleanups
[a] https://github.com/vulkano-rs/vulkano/blob/master/DESIGN.md
BUG=b:146066070, b:173630595, b:150239451
TEST=launch virtual machine with 2D mode
TEST=launch virtual machine with 3D mode
TEST=run sommelier with "wl-dmabuf" and "wl-shm"
Change-Id: I693a39cef64cd98e56d843d3c60caa7983d4d6e1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2626487
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Commit-Queue: Gurchetan Singh <gurchetansingh@chromium.org>
This reverts commit 890ae4cdb8.
Reason for revert: breaks arc.Boot.vm on kukui-arc-r
Original change's description:
> Relocate FDT to beginning of RAM
>
> This change serves two purposes. The FDT needs to be in a location
> accessible by 32 bit devices. Secondly the FDT's location was dependent
> on the amount of RAM allocated to the guest prior to this change which
> made passing it's location to the BIOS challenging.
>
> By moving the FDT to a fixed location within the 32 bit accesible memory
> boundary, these problems have been fixed.
>
> BUG=b:177926450
> TEST=local boot of android virtual device on ARM host
> Change-Id: I89e481f66ddc8ffcf0e86f00fbfa92d407c48736
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2641126
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Tested-by: Ram Muthiah <rammuthiah@google.com>
> Commit-Queue: Ram Muthiah <rammuthiah@google.com>
Bug: b:177926450
Bug: b:178427080
Change-Id: Iba629542d024fff84721ff434655c0c322020db3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2656215
Reviewed-by: Ryo Hashimoto <hashimoto@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Ryo Hashimoto <hashimoto@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Ryo Hashimoto <hashimoto@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This change serves two purposes. The FDT needs to be in a location
accessible by 32 bit devices. Secondly the FDT's location was dependent
on the amount of RAM allocated to the guest prior to this change which
made passing it's location to the BIOS challenging.
By moving the FDT to a fixed location within the 32 bit accesible memory
boundary, these problems have been fixed.
BUG=b:177926450
TEST=local boot of android virtual device on ARM host
Change-Id: I89e481f66ddc8ffcf0e86f00fbfa92d407c48736
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2641126
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Ram Muthiah <rammuthiah@google.com>
Commit-Queue: Ram Muthiah <rammuthiah@google.com>
When a FDT's property contains multiple values, the property must be a byte
array which uses the null character ('\0') as the delimiter, but we didn't
so.
This CL fixes the format so the guest kernel can parse PSCI versions
properly.
BUG=b:174224484
TEST=arc.Reboot.vm on kukui-arc-r
Change-Id: I61a983251cdbe8c021f5999cbf5efd026bbc0c27
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2567837
Tested-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Marc Zyngier <mzyngier@google.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Allow devices to be added to a Bus without a mutex. If a device
implements BusDeviceSync and is inserted into the Bus via the new
insert_sync function, the Bus will not lock the device before write and
read operations. This feature will allow IrqChip implementations to use
the mmio bus for APIC mmio, and allow each vcpu to write to their
respective APICs simultaneously.
This also changes the BusDevice trait so read and write functions take a
new BusAccessInfo struct. The BusAccessInfo conveys the full address of
the read/write operation, the offset of the address relative to the
device start address, and an id that in practice will hold the vcpu id
for the vcpu thread perforing the read/write.
As a result, inserts into the Bus are no longer distinguished between
full_addr and non full_addr inserts. Instead, each device's BusDevice
implementation must decide whether they use the absolute read/write
address or the relative read/write offset.
BUG=chromium:1077058
TEST=ran build_test
TEST=ran simple debian image
Change-Id: I9125aaa69869c1004b6c6a099b50f5c58038d4ab
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2514662
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Call KVM_REG_ARM_PSCI_VERSION to see the PSCI version and use the value
when creating a device-tree node.
Also stop setting PSCI constants which are ignored by kernel.
BUG=chromium:1141902
TEST=run crosvm on krane and check /proc/device-tree/psci/compatible
Change-Id: I4b8ed7620d7f0e2205b84b5f08cfaa5ae8d94339
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2529289
Tested-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Add a new command "battery" which is used to modify the virtual
battery/ac status.
When there is goldfish battery device model created, the command
is able to sent to the goldfish battery monitoring thread. If no,
the command won't be sent.
The supported commands are:
1. crosvm battery goldfish status <status string> crosvm.sock
2. crosvm battery goldfish health <health string> crosvm.sock
3. crosvm battery goldfish present <number> crosvm.sock
4. crosvm battery goldfish capacity <number> crosvm.sock
5. crosvm battery goldfish aconline <number> crosvm.sock
"goldfish" is the battery identifier to specify which virtual battery
is going to be modified by this command in case there are multiple
virtual batteries in the guest in future. Right now only one goldfish
battery is supported.
BUG=chromium:1050432
BUG=b:137890633
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
and boot linux guest with goldfish_battery driver enabled. From host
side, execute command "#crosvm battery goldfish status discharging
crosvm.sock" can make the guest receive an interrupt, and the status
sysfs is changed to "Discharging". Also tested the other commands
as well.
TEST=modified values are visible in ARCVM and interrupts are triggered
Change-Id: I82177811a6f2b1960f7895522760ff3b8143163f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119574
Tested-by: Alex Lau <alexlau@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alex Lau <alexlau@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
The goldfish battery irq will be used to notify the guest driver that
battery/ac status changed. And the status changing will be done through
external crosvm commands. So the irq injection needs to be done in a
seperate thread which can receive these commands.
BUG=chromium:1050432
BUG=b:137890633
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
and boot linux guest with goldfish_battery driver enabled. The sysfs
created by the goldfish_battery driver have no issue observed.
TEST=goldfish_battery driver is loaded on ARCVM and interrupts are enabled
Change-Id: Icc902dd8c00bdcf6cb271b20d928a4081533dde6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119573
Commit-Queue: Alex Lau <alexlau@chromium.org>
Tested-by: Alex Lau <alexlau@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Create goldfish battery device model for guest. Provide the
minimal properties and basic accessing for the golfish_battery
driver in the guest.
BUG=chromium:1050432
BUG=b:137890633
TEST=create VM with parameter "--battery" or "--battery=type=
goldfish" and boot linux guest with goldfish_battery driver
enabled. The goldfish_battery driver is loaded successfully.
The /sys/class/power_supply/battery and
/sys/class/power_supply/ac are created successfully.
TEST=cargo test -p crosvm
TEST=goldfish_battery driver is loaded on ARCVM after crrev.com/c/2519336
Change-Id: Iaafa09e3d7e5664d3db8b7df5295f077ec3f6da9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119572
Commit-Queue: Alex Lau <alexlau@chromium.org>
Tested-by: Alex Lau <alexlau@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Virtio 1.1 introduces the VIRTIO_F_ACCESS_PLATFORM reserved feature bit,
which allows the guest operating system to discover that a virtio device
has limited access to memory. In the case of Linux, this forces the use
of the DMA API for virtio transfers, which in turn can bounce data
through a shared window that is negotiated between the guest and the
hypervisor.
Advertise the VIRTIO_F_ACCESS_PLATFORM reserved feature bit when crosvm
is running with the '--protected-vm' option.
BUG=None
TEST=./build_test
Change-Id: I78e8d9e78999790059639b64611b8081c39d24ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2453560
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
This allows code to create references to traits such as `&dyn Vcpu` for
`&dyn IrqChip`. This also allows keeping such traits inside of opaque
`Box` like wrappers.
To achieve this, trait methods referencing `Self` have an additonal
`where` clause that restricts them to sized types. Associated types are
removed and replaced with their trait equivalents (as parameters) or an
opaque Box (as return values).
To work around certain cases where a concrete type is needed, such as
for KVM based `IrqChip` impls, the `downcast_rs` trait is used to allow
`dynamic_cast` style casting.
The binary size impact of this change is small. For comparison, here is
the size change with this commit:
armv7a -0.49% (-9 kiB)
aarch64 -0.17% (-3 kiB)
x86_64 +1.77% (+40 KiB)
BUG=None
TEST=build_test
Cq-Depend: chromium:2466660
Change-Id: I1a408734832d2971ea2979c1bc64b2ffe051b02d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2439298
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
New option, --size-only, speeds up using build_test for getting release
binary size by skipping everything else. The lto flag is also added for
release builds to get a more realistic comparison.
The list of crates to test is built up automatically instead of
hard coded. To modify what gets included, empty .build_test_* files are
checked for existance. This is better than hard coding the list of
packages because it was frequently out of date.
For certain crate tests, a dynamic library that only exists in a sysroot
is required. This change includes a fix that adds the sysroot's lib
directory to the LD_LIBRARY_PATH env variable, similar to how
PKG_CONFIG_LIBDIR is modified.
TEST=build_test
BUG=None
Change-Id: I626cbcccf40035a0d29001cef7989a091848e4c9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2444273
Tested-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Zach Reizner <zachr@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Zach Reizner <zachr@chromium.org>
