Rust bindgen now supports --allowlist and --blocklist option names as of
https://github.com/rust-lang/rust-bindgen/pull/1990 - use them in the
various bindgen invocations in scripts and comments.
BUG=b:178821708
TEST=../dev/contrib/search_blocked_words.sh unblocked_terms.txt
Change-Id: I9797f049999a01ab2c41617823463236b4d03cbb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3243012
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Some devices like virtio-pmem, intel host bridge need private mmio, these private
mmio isn't exposed to Vm through pci bar, and crosvm use mmio allocation interface
to allocate them, so guest OS pci bus driver couldn't detect them, and once guest
OS reallocate pci mmio, these private mmmio could be assigned to pci device bar.
then resource conflict happens.
This patch allocates these non pci bar mmio at the top of HighMmio, since HighMmio
is large enough and OS allocates pci mmio from low to high. So these non pci bar
mmio won't conflict with pci bar.
BUG=b:199442120
BUG=b:185084350
TEST=crosvm run --pmem-device xxxx
Change-Id: I615d7901d595dd46ba6362f88b71d96baa9c4c8f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3184549
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
At present the Guest generates its own CPU topology. To mitigate
cross-hyperthread speculative execution side channel attacks, allow
Guest to use mirror CPU topology of Host is needed for future scheduling
optimization.
Add a config option "--host-cpu-topology" to ask the vCPU number to be
identical to physical CPUs, and make the vCPU has the same APIC ID in
MADT and CPUID as the corresponding physical CPU. The same APIC ID can
ensure the same topology.
"--host-cpu-topology" requires vCPU number must equal to pCPU number,
and it has the default vCPU number setting, which equals to pCPU number.
"--host-cpu-topology" also defaultly sets CPU affinity for each vCPU to
the pCPU which has the same processor ID, like 1=1:2=2:3=3:4=4, so that
the vCPU and its corresponding pCPU will have the same processor ID and
the same APIC ID. User can't set CPU affinity if "--host-cpu-topology"
was set.
BUG=b:197875305
TEST=Set "--host-cpu-topology" option and check Guest's /proc/cpuinfo,
lscpu, CPUID for different vCPU
Change-Id: Ibc4eb10649e89f43b81bde6d46d6e0e6c7234324
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3217035
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
At present the Guest use the cpu id (enum number) as the APIC ID in vCPU
CPUID and set the different topology with pCPU.
To support the feature vCPU has the same topology as pCPU, vCPU need the
same APIC ID as pCPU. So let vCPU can use the APIC ID from pCPU in
vCPU's CPUID and keep pCPU's topology related information (include CPU
count and topology mask) unchanged.
Now this change is a preliminary preparation and doesn't work.
Additional feature options and corresponding CPU number and CPU affinity
settings are still required.
BUG=b:197875305
TEST=cargo build
TEST=./test_all
Change-Id: I04150ac6c35534d0ff56667b01f448da2ca9f9fc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3217034
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
At present the Guest use the cpu id (enum number) as the APIC ID in
Guest MADT.
To support the feature vCPU has the same topology as pCPU, vCPU need
the same APIC ID as pCPU. So let Guest MADT can use the APIC ID from
Host is needed.
Now this change is a preliminary preparation and doesn't work. The APIC
ID related changes for vCPU CPUID are still required.
BUG=b:197875305
TEST=cargo build
TEST=./test_all
Change-Id: I0e7dfba8cd57fefd85b7d7e37de3bb9935ff19ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3217033
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
With vfio pci device hotplug, bus->devices will be inserted and removed at
runtime in different vcpu threads, so mutex should be used to protect it.
Both each vcpu thread and pci_root share mmio_bus and io_bus, so use Arc
for mmio_bus and io_bus. But pci_root is inserted into io_bus for pci cfg io,
in order to resolve reference loop and memory leak, weak is used for
pci_root.mmio_bus and pci_root.io_bus.
BUG=b:174705596
TEST=boot a vm and check its function
Change-Id: I7b3e63db76a90bc3873619b4d80a66db741ce78f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3184724
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This was an oversight from the previous commit to pass the kernel
command line to a bios.
BUG=b:200208446
TEST=Observe pstore working across reboots
Change-Id: Ie93cc3399000a83099d396f4dde1da9d835704be
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3197732
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Auto-Submit: Tom Cherry <tomcherry@google.com>
Before we call build_vm we are creating devices and there is no reason
to assume those have to be PCI only. In preparation for VFIO platform
device support, add super trait which allows to pass generic device
structure around and still be able get back to our original type.
BUG=b:185504618
TEST=manatee PCI device passthrough boots/works
Change-Id: I500f44af430f5f06299f20fc4ca17ca008a7e0c5
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961210
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This enables the bios to read kernel command line parameters
from crosvm and pass them to the kernel that it loads.
BUG=b:195323844
TEST=pass --params through uboot to Linux
Change-Id: I306bb16421393583edc8b0dbdb3198a5b3cc0377
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3140277
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tom Cherry <tomcherry@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Replace the uses of read_struct() and read_struct_slice() with the
safe DataInit::from_reader() implementation.
BUG=b:197263364
TEST=./test_all
TEST=Boot bzImage kernel
TEST=Boot raw ELF kernel extracted with extract_vmlinux
Change-Id: I80f98243bfb58a7ae93e1686bc4d92b0cd485cda
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3108249
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Tree-wide cleanup of new clippy warning in Rust 1.54 that warns about
needless borrows:
error: this expression borrows a reference (`&...`) that is
immediately dereferenced by the compiler
https://rust-lang.github.io/rust-clippy/master/index.html#needless_borrow
BUG=b:197251702
TEST=bin/clippy # with rust-toolchain = 1.54.0
Change-Id: Ib702ec524d4623d264a00ec11dbc2150c411a67b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3108321
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Allen Webb <allenwebb@google.com>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Add necessary kernel cmdlines for aarch64.
Adjust PCI address to make room for ramoops on aarch64.
Move the code from x86_64 to common places.
BUG=b:153934386
TEST=vm_pstore_dump
Change-Id: I8f92a7fd04a49afd7e8be9e7cf1901ef70b88d65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3103131
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Kansho Nishida <kansho@chromium.org>
Commit-Queue: Ryo Hashimoto <hashimoto@chromium.org>
Device implement HotPlugBus trait could notify hotplug event into
guest, and such device should be added into RunnableLinuxVm, so it
could be used at device plug in and plug out.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: I9497f61312582483090ff708d0f37b97d7303811
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954673
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
When a vfio pci device is added through hotplug in, it should be configured
at runtime and added into pci_root->devices tree, so pci_root is added
into linux.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: Ibcb5f4a849134f64fbceeac645bebd80d6ca72d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954672
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Move the definitions of SerialHardware, SerialParameters and SerialType
to the devices crate so that they'll be available for code in the
devices crate as well.
BUG=b:195495971
TEST=cargo test
Change-Id: Ieb711bdb18a8afdb28cac262a3355739604d4607
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3096439
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
BUG=b:191784608
TEST=Build and run atest in Android tree
Cq-Depend: chromium:3073700
Change-Id: I5fcfa166caf8c5a5f759a8f62ef78a293db95f1a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3071900
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
This flag is intended to be used to delay making a VM's RT VCPUs
RT until "make_rt" is called, in order to avoid boot time
regressions with RT.
BUG=b:142777321
TEST="grep policy /proc/<pid of rt vcpu>/sched" to make sure RT vcpu
isn't RT until "make_rt".
Change-Id: I1b9132e11f0acc626434c60cecc2f4afe350961a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2703224
Auto-Submit: Suleiman Souhlal <suleiman@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Suleiman Souhlal <suleiman@chromium.org>
The devices to be notified on resume are unrelated to the functionality
of Bus, which is looking up devices in an address space. Additionally,
each Bus instance had its own list of devices to notify, although in
practice, only the one in the I/O bus was used.
Move the resume_notify_devices list into RunnableLinuxVm instead.
BUG=None
TEST=Boot Crostini on x86 and arm
Change-Id: I72c629c6d6589c4a9350831c8a076c5c0c9f9aeb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3043489
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Supply the OS with basic PCI hostbridge information (PIO region, MMIO
region, etc) using Device (_SB.PCI0) in DSDT. Without this info the
Linux kernel behaves erroneously in iova_reserve_pci_windows().
Output from the Linux kernel, w/o _SB.PCI0:
pci_bus 0000:00: root bus resource [mem 0x00000000-0x7fffffffff]
Since DSDT contains PCI hostbridge information, ACPI is always required.
Use "acpi=noirq" in cmdline when DSDT/MADT is not provided by the user.
The Linux kernel refers to PCI configuration space for interrupt
routing.
BUG=b:181736020
TEST=boot Linux kernel and check dmesg
Change-Id: Id328a958fb770e087788e71fe480839eab4f40c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2846422
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
In VT-d, the IOMMU hardware can translate guest physical address that
is no more than MGAW (Maximum Guest Address Width) which is reported
from the VT-d Capability register.
We pass this information to the guest IOMMU front driver so that it
can allocate appropriate IOVA.
VT-d indicates that "implementations must support MGAW at least equal
to the physical addressability (host address width) of the platform".
Thus we take the Physical Address Bits that is reported by
CPUID.80000008H as the minimum MGAW.
BUG=b:181736020
TEST=--vfio=/sys/bus/pci/devices/0000:00:14.0,iommu=on
Change-Id: I26a421ea2e7dd893d413d63ab313721cfdf0b5c1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2757278
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Stevens <stevensd@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: David Stevens <stevensd@chromium.org>
Most of the MADT describes hardware that isn't passed through to the
guest. Instead of passing that information to the guest, use a MADT
generated by crosvm. However, we do want to pass through the irq
override structures, so append those to the generated MADT.
BUG=none
TEST=boot kindred and observe 2 cores in the CrOS guest
Change-Id: Ia7279578f2eab6be1092817e3c2700905c10dd05
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2908281
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Fixes clippy warnings like:
using `clone` on type `...` which implements the `Copy` trait
and
redundant clone
note: this value is dropped without further use
BUG=None
TEST=bin/clippy
TEST=cargo test -p devices
Change-Id: I8c13b79b54265e5527cadcb8a2e9f54419044bcf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2885781
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
SMI Interface is not supported by crosvm. Clear FADT.SMI_COMMAND field
to disable ACPI enable/disable transitions.
BUG=b:145604457
TEST=Boot system with user provided ACPI tables.
Change-Id: I17daafc4b2ffded5ba8235ad19e24aa67ad5c8a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2893368
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
This will be used to dynamically add and remove bus ranges when the PCI
command register is updated to enable/disable memory and IO decode.
BUG=b:174705596
TEST=cargo test -p devices
Change-Id: I6bb175e0628bf598d049562700e2f55a2a62df59
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2689081
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
These parameters multiplied the number of type arguments to build_vm
unnecessarily and complicated the thread of execution in the programmers
head. Closures also complicate the borrow rules, making things much
harder to change.
This change uses the results of the closures (e.g. PCI devices, IRQ
chips) as parameters instead. The rest of this change follows naturally
from pulling on that thread until tests pass.
As a result of the removal of several type arguments, the code size was
reduced by ~100KiB on a 5MiB build.
BUG=b:185170486
TEST=./test_all
Change-Id: I6bcc5eb1b1f3031d4328bb4a81ddef618d04767b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2829136
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
User provided DSDT/MADT/FADT tables will have precedence
over crosvm generated data, with crosvm only overriding
critical FADT fields to match ACPI tables placement.
Also, this patch adds mandataory empty FACS structure.
BUG=None
TEST=run guest with set of ACPI tables provided and verify content.
Change-Id: I3f3ff2170c08b3f570ff863ecc45c5bf203eb940
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2841754
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This requires exporting the memory layout from the arch crates, but it
does simplify the bloated build_vm interface a bit. It also will allow
for more fine-grained control the backing memory of GuestMemory.
TEST=test_all
BUG=b:183988204
Change-Id: Ie76755198d2fdc2a41bd538650939d6550686b88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2809434
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Some judgement calls were made about unnecessary wrapping. Usually they
would get resolved by removing the wrapping or returning a convenient
error, but the ones that returned results for consistency with other
functions were added to the allow list.
The error handling in the usb code had a lot of unit error types which
is now a clippy lint. This was resolved by either removing the result
entirely or returning a convenient error.
The field_reassign_with_default lint is faulty and was added to the list
of supressions. This affected virtio-wayland code.
BUG=b:179277332
TEST=cargo clippy with rustc 1.50+
Change-Id: Ie812cdeaf7c42f4f2b47b1dc87f05a7c87a60f8f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2757510
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Auto-Submit: Zach Reizner <zachr@chromium.org>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
More recent Intel IO-APICs can support more than 24 interrupt
lines. This change enables variable size of IO-APIC lines for
user level IO-APIC emulation code (split-irqchip).
Reported version and supported IO-APIC registes matching ICH10
implementation of IO-APIC device.
BUG=b:181795297
TEST=boot and allocate irq from upper range.
Change-Id: I56480befb39c4c268266f04e4a93105402248772
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2733579
Tested-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Ovmf goes through all entries in smbios table, without end entry,
assert() failure occurs.
BUG=b:179053182
TEST='crosvm run -bios OVMF.fd' and boot OVMF into efi shell
Change-Id: I0068133c75583dc4a3477d01a58f0ee8775b509e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2741918
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This removes some unsafe code, improving the interface so that it cannot
be misused (e.g. previously, different Vec<u8> instances could be passed
to fdt functions that did not validate the contents).
The new implementation also adds some extra error checking to catch
invalid string values in all API entry points that accept strings, as
well as out-of-order node nesting that would result in DTB data that did
not conform to the spec.
BUG=b:175729255
TEST=cargo test -p arch
TEST=Boot Crostini on kevin (arm)
TEST=diff old and new dts from `dtc -I fs -O dts /proc/device-tree`
Change-Id: I567d562ed1b447aa0d282b68c71758edea13ffc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2713569
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
- Add an address space region for the protected KVM firmware.
- Query firmware size, mmap something that size and create a memslot.
BUG=b:163789172
TEST=cargo test
Change-Id: I054cf5d763c980d073c17bce70e85a781816b64d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2623942
Auto-Submit: Andrew Walbran <qwandor@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
A BIOS can be larger or smaller than 1 MB; as long as the image is
placed so the reset vector lines up in the correct place at the end of
the 32-bit address space, everything should work.
BUG=b:179053182
TEST=`crosvm run --bios OVMF.fd` and observe debug messages
Change-Id: Ibafd9bb5ee4fd4b0ff2c28c38f022ff3b36dd95d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2651288
Reviewed-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
rutabaga_gralloc is a cross-platform, Rust-based buffer
manager.
The rationale for this change is:
1) For the {cross-domain, wayland} context type, we need to
have a good story for the crucial "wl-dmabuf" feature. As
minigbm has been thoroughly tested on ChromeOS and currently
powers the "wl-dmabuf" feature, it only makes sense for us to
have a path to minigbm for the cross-domain prototype. This
will be used by Sommelier.
2) While minigbm allocation works well on Chromebooks, it is
not sufficient for cross-platform purposes. For their Virtual
Graphics Interface (VGI) initiative, Android graphics
virtualization experts have expressed their desire for a Vulkan
based allocator. This will to go alongside cros_gralloc in
minigbm, which is considered by many to be the ""world's
premiere gralloc implementation".
3) Android graphics virtualization experts have expressed their
desire for vkMapMemory(..) to be used when crosvm is in
multi-process mode. Currently, only dma-buf mmap() is supported
for zero-copy blobs in multi-process mode. dma-buf mmap() is not
guaranteed to work on Nvidia (a "must have" for Cuttlefish) or
any other driver for that matter (we *make* it work for ChromeOS).
Possibly only solution: vkMapMemory ;-)
With these goals in mind, here's a summary of the revelant changes:
* Renamed the {gpu_allocator.rs, GpuMemoryAllocator trait} to be
{gralloc.rs, Gralloc trait}.
* Moved all GPU allocation out of the resources crate and into
the rutabaga_gfx crate. This will allow the resources crate to
be focused on managing resources for virtual machines.
* Moved the gpu_buffer crate into the gralloc module in the
rutabaga_gfx crate. The same functionality is now under
"minigbm.rs", "minigbm_bindings.rs" and "rendernode.rs"
* Added an optional dependency on vulkano.rs. vulkano.rs is a safe
Rust wrapper around the Vulkan api [a]. It's emphasis on type
safety makes a good fit for crosvm, though there are other high
quality crates out there (gfx-rs, ash.rs). Though development
has slowed down, it should satisfy goals (2) and (3) quite easily.
* Added a system_gralloc implementation based on memfd. This can be
used when minigbm or Vulkano features are not used, to replicate the
highly useful "wl-shm" feature in Sommelier. Astute observers will
note this can also enable seamless Wayland windowing without GPU
features for Android too. Some minor changes to the base crate were
needed.
* Cut down on the amount of DrmFormats to the subset needed by
Sommelier and cros_gralloc.
* Moved checked arithmetic into it's own file.
* Internally renamed to "wl-dmabuf" feature to be the "minigbm"
feature. This is because "wl-dmabuf" has a dependency on minigbm.
* Small rutabaga_gfx cleanups
[a] https://github.com/vulkano-rs/vulkano/blob/master/DESIGN.md
BUG=b:146066070, b:173630595, b:150239451
TEST=launch virtual machine with 2D mode
TEST=launch virtual machine with 3D mode
TEST=run sommelier with "wl-dmabuf" and "wl-shm"
Change-Id: I693a39cef64cd98e56d843d3c60caa7983d4d6e1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2626487
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Commit-Queue: Gurchetan Singh <gurchetansingh@chromium.org>
This test was useful for debugging issues with the hypervisor
abstraction layer while it was in development. It's similar to some of
the kvm integration tests, but runs the x86_64 setup functions. It has
some commented out lines for having this test load a real kernel and/or
ramdisk, which can also be useful for debugging boot problems.
RESTRICT_AUTOMERGE
BUG=b:175025264
TEST=cargo test -p x86_64
Change-Id: If5b89fe48d34db50fb962382032881e4e588db6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2579896
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
When no_smt isn't set, guest works with hyperthread enabled, but crosvm
doesn't emulate processor topology cpuid at this case, so the output of
guest /proc/cpuinfo and lscpu is inconsitent, and guest cpuid is wrong.
This commit adds such support. If vcpu_num is >1 and is even, threads
per core is 2 and cores_num is vcpu_num/2. If vcpu_num is >1 and is odd,
threads per core is vcpu_num and cores_num is 1.
BUG=None
TEST=Check guest /proc/cpuinfo, lscpu, cpuid at different vcpu number
Change-Id: I8d9aaeac3fc911ee91bf2eb0586e457aac27a185
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2548450
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Allow devices to be added to a Bus without a mutex. If a device
implements BusDeviceSync and is inserted into the Bus via the new
insert_sync function, the Bus will not lock the device before write and
read operations. This feature will allow IrqChip implementations to use
the mmio bus for APIC mmio, and allow each vcpu to write to their
respective APICs simultaneously.
This also changes the BusDevice trait so read and write functions take a
new BusAccessInfo struct. The BusAccessInfo conveys the full address of
the read/write operation, the offset of the address relative to the
device start address, and an id that in practice will hold the vcpu id
for the vcpu thread perforing the read/write.
As a result, inserts into the Bus are no longer distinguished between
full_addr and non full_addr inserts. Instead, each device's BusDevice
implementation must decide whether they use the absolute read/write
address or the relative read/write offset.
BUG=chromium:1077058
TEST=ran build_test
TEST=ran simple debian image
Change-Id: I9125aaa69869c1004b6c6a099b50f5c58038d4ab
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2514662
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Add methods to the IrqChip trait to block in userspace on halted vcpus.
Add IrqChip::check_capability, used for cpuid setup.
Move interrupt injection logic from linux.rs to a new
IrqChip::inject_interrupts method, which replaces interrupt_requested
and get_external_interrupt.
These changes are to support setup, run loop, and injection in the
userspace irqchip.
BUG=chromium:1077058
TEST=boots with KVM kernel irqchip, KVM split irqchip
Change-Id: I8f46b5edf36acc485b5f76e7aed3e71c3b984c0e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2419674
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
The S5 capability allows the VM to be powered off when user execute
'poweroff' command. This is done by trigger the exit event through
the ACPI PM1 control so that crosvm can shutdown the VM in the end.
BUG=None
TEST=boot a VM and then run 'poweroff' command from VM's shell. The
VM can exit.
Change-Id: Iaad5615fd72550568362090c3b876202055cc25a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2534098
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Add a new command "battery" which is used to modify the virtual
battery/ac status.
When there is goldfish battery device model created, the command
is able to sent to the goldfish battery monitoring thread. If no,
the command won't be sent.
The supported commands are:
1. crosvm battery goldfish status <status string> crosvm.sock
2. crosvm battery goldfish health <health string> crosvm.sock
3. crosvm battery goldfish present <number> crosvm.sock
4. crosvm battery goldfish capacity <number> crosvm.sock
5. crosvm battery goldfish aconline <number> crosvm.sock
"goldfish" is the battery identifier to specify which virtual battery
is going to be modified by this command in case there are multiple
virtual batteries in the guest in future. Right now only one goldfish
battery is supported.
BUG=chromium:1050432
BUG=b:137890633
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
and boot linux guest with goldfish_battery driver enabled. From host
side, execute command "#crosvm battery goldfish status discharging
crosvm.sock" can make the guest receive an interrupt, and the status
sysfs is changed to "Discharging". Also tested the other commands
as well.
TEST=modified values are visible in ARCVM and interrupts are triggered
Change-Id: I82177811a6f2b1960f7895522760ff3b8143163f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119574
Tested-by: Alex Lau <alexlau@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alex Lau <alexlau@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
The goldfish battery irq will be used to notify the guest driver that
battery/ac status changed. And the status changing will be done through
external crosvm commands. So the irq injection needs to be done in a
seperate thread which can receive these commands.
BUG=chromium:1050432
BUG=b:137890633
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
and boot linux guest with goldfish_battery driver enabled. The sysfs
created by the goldfish_battery driver have no issue observed.
TEST=goldfish_battery driver is loaded on ARCVM and interrupts are enabled
Change-Id: Icc902dd8c00bdcf6cb271b20d928a4081533dde6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119573
Commit-Queue: Alex Lau <alexlau@chromium.org>
Tested-by: Alex Lau <alexlau@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Add a flag '--gdb <port>' to provide GDB remote protocol interface so
a developer can attach GDB to the guest kernel.
In this CL, we support read/write operations for registers and memories.
BUG=chromium:1141812
TEST=Attach gdb and see register values on workstation and intel DUT
Change-Id: Ia07763870d94e87867f6df43f039196aa703ee59
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2440221
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: Keiichi Watanabe <keiichiw@chromium.org>
Auto-Submit: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Create goldfish battery device model for guest. Provide the
minimal properties and basic accessing for the golfish_battery
driver in the guest.
BUG=chromium:1050432
BUG=b:137890633
TEST=create VM with parameter "--battery" or "--battery=type=
goldfish" and boot linux guest with goldfish_battery driver
enabled. The goldfish_battery driver is loaded successfully.
The /sys/class/power_supply/battery and
/sys/class/power_supply/ac are created successfully.
TEST=cargo test -p crosvm
TEST=goldfish_battery driver is loaded on ARCVM after crrev.com/c/2519336
Change-Id: Iaafa09e3d7e5664d3db8b7df5295f077ec3f6da9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119572
Commit-Queue: Alex Lau <alexlau@chromium.org>
Tested-by: Alex Lau <alexlau@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Virtio 1.1 introduces the VIRTIO_F_ACCESS_PLATFORM reserved feature bit,
which allows the guest operating system to discover that a virtio device
has limited access to memory. In the case of Linux, this forces the use
of the DMA API for virtio transfers, which in turn can bounce data
through a shared window that is negotiated between the guest and the
hypervisor.
Advertise the VIRTIO_F_ACCESS_PLATFORM reserved feature bit when crosvm
is running with the '--protected-vm' option.
BUG=None
TEST=./build_test
Change-Id: I78e8d9e78999790059639b64611b8081c39d24ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2453560
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
This allows code to create references to traits such as `&dyn Vcpu` for
`&dyn IrqChip`. This also allows keeping such traits inside of opaque
`Box` like wrappers.
To achieve this, trait methods referencing `Self` have an additonal
`where` clause that restricts them to sized types. Associated types are
removed and replaced with their trait equivalents (as parameters) or an
opaque Box (as return values).
To work around certain cases where a concrete type is needed, such as
for KVM based `IrqChip` impls, the `downcast_rs` trait is used to allow
`dynamic_cast` style casting.
The binary size impact of this change is small. For comparison, here is
the size change with this commit:
armv7a -0.49% (-9 kiB)
aarch64 -0.17% (-3 kiB)
x86_64 +1.77% (+40 KiB)
BUG=None
TEST=build_test
Cq-Depend: chromium:2466660
Change-Id: I1a408734832d2971ea2979c1bc64b2ffe051b02d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2439298
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
When set, VCPUs aren't presented to the guest as hyperthreads,
on Intel.
Instead, present them as different, non-hyperthreaded cores on
the same package. Presenting them as hyperthreads might make the
guest scheduler migrate tasks between VCPUs more aggressively,
which can be expensive in a VM.
AMD will need a different CL.
BUG=b:169828263
TEST="cat /proc/sys/kernel/sched_domain/cpu0/domain0/name" in
the guest returns "MC" instead of "SMT" when starting crosvm
with --no-smt.
Change-Id: Ifdb4d54a3d7d83c5620fa768ce88ba1a0d85ee50
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2460534
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Suleiman Souhlal <suleiman@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Suleiman Souhlal <suleiman@chromium.org>
Note the CL size is large entirely due to the rename,
the changes are mostly negligible.
Also making a few small additional changes in sys_util
areas that don't need much attention in base. This includes
typedefing and adding specific imports for areas that don't
require significant interface changes.
BUG=b:162363783
TEST=./build_test
Change-Id: I4a2c9c4cdce7565806ed338e241c6b8c82c855c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2415180
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
This is very largely boilerplate, but changes some interfaces
to accept different parameters, esp using Descriptor.
BUG=b:162363783
TEST=./build_test
Change-Id: I81b513c0de9448c2de505fe5d3a61a29f4eccb78
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2342591
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
This leaf is used to identify the APIC ID on Intel systems.
Fixes guest kernel warnings of this type:
[Firmware Bug]: CPU1: APIC id mismatch. Firmware: 1 APIC: 11
BUG=b:167714813
TEST=Boot Linux guest kernel; check dmesg
Change-Id: Icc3d32f5a382704c28ecc174b98c982c574bd2b0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2402154
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The existing mem_below_4g/mem_above_4g calculations did not match the
actual layout used when populating guest memory. Rather than
duplicating the logic in setup_io_bus to calculate the values reported
in CMOS, just reuse the arch_memory_regions function and count the bytes
in the regions below and above the 4G boundary.
BUG=b:168740534
BUG=b:168628037
TEST=Verify u-boot reports 4 GiB with crosvm --mem=4096
Change-Id: I32a70f19848595eaefd2e31c9f31a260d6ce4453
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2422129
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
When the RAM size is specified to be exactly 3328 MiB (4096 - 768),
there is no memory after the gap; however, the arch_memory_regions code
was adding a zero-sized region to the list of guest memory areas to be
mapped.
This would result in a mmap syscall failure at startup:
[ERROR:src/main.rs:1590] The architecture failed to build the vm:
failed to set up guest memory: failed to map guest memory: mmap system
call failed: Invalid argument (os error 22)
Fix the off-by-one error when checking whether the address of the end of
guest memory is within 4 GB so that the > 4GB branch is not taken with
mem=3328.
BUG=chromium:1129547
TEST=crosvm run --mem=3328 vm_kernel
TEST=cargo test -p x86_64
Change-Id: I66cd66c98d690b42b2e1d97312528bb0d4830e76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2417004
Reviewed-by: Ram Muthiah <rammuthiah@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Add an option to set some vcpus as real time. With a cooperative guest,
this allows for getting real time behavior for a subset of guest
threads. The guest will use cpusets to ensure that only real time tasks
are run on the real-time CPU, and that vcpu thread is real-time on the
host leading to behavior close to host real-time threads.
BUG=b:142777321
TEST=crosvm --rt-cpus 1 [OPTION]...
ps -AT -eo comm,sched,rtprio | grep crosvm_vcpu
then check the sched policy of vcpu1 is 2 (SCHED_RR)
Change-Id: Ic8e7a6840bdbce2c90e518458f6d0c50a65ca3f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2152167
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Suleiman Souhlal <suleiman@chromium.org>
Tested-by: Kansho Nishida <kansho@chromium.org>
Commit-Queue: Kansho Nishida <kansho@chromium.org>
Calls to the kvm crate have been replaced by calls to hypervisor and
devices::irqchip. Plugin is unchanged and still KVM-specific.
x86 creates and configures vcpus on the vcpu thread instead of the main
thread.
Code that still depends on kvm or kvm_sys:
- crosvm_plugin, plugin, and protos use kvm and kvm_sys if built with
the plugin feature
- devices::VfioGroup does a kvm_sys ioctl
- devices::irqchip and hypervisor use kvm_sys. hypervisor uses
kvm::Cap and kvm::CpuId internally for now.
BUG=chromium:1077058
TEST=runs es2gears_wayland on kukui
TEST=runs evince on amd64-generic with kernel and split irqchip
TEST=build_test excluding tpm2
TEST=cargo check --features plugin
Change-Id: I0068e34da6a5ff0079b1237be1958933bf12ffe4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2307711
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Richman <srichman@google.com>
The emulated CMOS RTC device always returns the hour field in 24-hour
format; initialize the Status Register B bit that indicates this to the
guest.
This also lets Linux register the CMOS RTC as an rtc-class device. It
was previously ignoring it since it was assuming the device was in
12-hour mode.
Also bump the minimum IRQ for the system allocator up to 9 to avoid
sharing IRQ 8, which becomes an issue once Linux tries to enable the RTC
device:
snd_intel8x0 0000:00:0b.0: PCI->APIC IRQ transform: INT C -> IRQ 8
genirq: Flags mismatch irq 8. 00000080 (snd_intel8x0) vs. 00000000 (rtc0)
snd_intel8x0 0000:00:0b.0: unable to grab IRQ 8
snd_intel8x0: probe of 0000:00:0b.0 failed with error -16
On x86_64, only 4 device IRQs are used (for PCI pin interrupts), so this
does not reduce the number of available IRQs for devices. Most PCI
devices in crosvm also support MSI-X, which this change also does not
affect.
BUG=b:162789858
TEST=Boot Linux 5.8; verify existence of /sys/class/rtc/rtc0
TEST=Boot on x86_64 Chromebook; verify IRQ 8 is not used by PCI devices
Change-Id: I39ca6a823914d2d27caec7812b54bf754ac3db9a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2337370
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
For now, this crate simply re-exports all of sys_util, but it will
be updated to provide new interfaces when needed. This is the
first step to making crosvm not directly depend on sys_util, so
that we can make the interface changes we need without fear of
negatively affecting (i.e. completely breaking) other usages
within chromeos.
BUG=b:162363783
TEST=./build_test
Change-Id: I7d0aa3d8a1f66af1c7fee8fd649723ef17027150
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2325168
Tested-by: Michael Hoyle <mikehoyle@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Regardless of what image type crosvm is running (kernel or bios), the
acpi tables, mptables, and smbios should all be set since they depend
on vm-initialization-time set values like the cpu count and the
available pci devices. The guest should not have to setup these
structs differently based on the crosvm inputs.
BUG=b:161912521
TEST=Booted cuttlefish with and without uboot
Change-Id: I98eb7176a6822769dcfb32d6decab717d08236e1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2325254
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Ram Muthiah <rammuthiah@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Auto-Submit: Ram Muthiah <rammuthiah@google.com>
Allow the caller of generate_pci_root to specify a maximum number of
IRQs to share between all PCI devices, and use this on x86 to limit the
total number of IRQs to fall within the number of interrupts present on
the current kernel APIC implementation.
BUG=b:161745666
BUG=chromium:1109486
TEST=Boot crosvm with many PCI devices
Change-Id: I07f0e4dab97fc952260ecacc2d84c02c77be1309
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2317899
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Lepton Wu <lepton@chromium.org>
Move GuestAddress and GuestMemory to a new crate for VM memory. This
will make separating sys_util and crosvm independent making it easier
to use sys_util functions outside of crosvm.
Change-Id: I12e14948ea85754dfa6267b3a3fb32b77ef6796e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2311251
Auto-Submit: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Tested-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Regardless of what image type crosvm is running, it must set the cpuid
since the cpuid is not set by software. This missing setting was
preventing uboot from jumping to the 64 bit kernel since it thought
the cpu was not long mode capable.
BUG=b:153027511
TEST=Booted cuttlefish with and without uboot
Change-Id: Ib8902b324532daf2a0e8ff462603207ff0c64bad
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2298171
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Ram Muthiah <rammuthiah@google.com>
io_jail has been migrated to aosp/external/minijail/rust/minijail.
This removes the crosvm copy and updates the references to use the new
location.
BUG=chromium:1096175
TEST=cargo test
Cq-Depend: chromium:2254418
Change-Id: I29d5c6178b6faf5e52671cfbe6fc7e51f0d21dd2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2254298
Tested-by: Allen Webb <allenwebb@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Allen Webb <allenwebb@google.com>
Enable support for user provided ACPI tables with supplementary system
description. Argument --acpi-table shall point to exsting file or
pseudo-file with valid ACPI table content.
BUG=None
TEST=boot Linux kernel with generated SSDT tables.
Change-Id: I8eac21da070dcc325884ed888cc7bcb01bc086ce
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2212501
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Tomasz Jeznach <tjeznach@chromium.org>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Change VolatileSlice so that it is ABI-compatible with iovec. This
allows us to directly pass in a VolatileSlice for a C function that
expects an iovec without having to create temporaries that convert from
one to the other.
Also change all the parameters from u64 to usize. It's not possible to
address more memory than fits into a usize so having u64 here didn't
really provide much benefit and led to a lot of tedious casting back and
forth all over the place.
BUG=none
TEST=unit tests
Cq-Depend: chromium:2206621
Change-Id: I258f9123c603d9a4c6c5e2d4d10eb4aedf74466d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2203998
Tested-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Add the AML support to generate the S1 table instead of hard coding.
Also use the IO allocater to allocate the IO resouce for ACPI PM.
BUG=None
TEST=boot crosvm by command "crosvm run -s crosvm.sock -m 4096 --cpus 4
--rwdisk rootfs.img -p "root=/dev/vda rootfstype=ext4" vmlinux".
Check the S1 capability by "#echo standby > /sys/power/state" from guest
side. Linux guest is suspended. And resume linux guest by "#crosvm resume
crosvm.sock" from host side.
Change-Id: I75b484c44db05f98d49557ba694a1531b57871c1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119571
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Simple refactor of FDT and MPTables generation to use PCI device
addressing and allow declatation of non-zero PCI bus ids for x86
architectures. It also allows non sequential IRQ allocation for
PCI devices.
BUG=None
TEST=build_test & tast run crostini.Sanity
Change-Id: I6cc31ce412199a732499b2d8d18d99f08d765690
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2175739
Tested-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
This allows the creation of virtio-console devices using the new
hardware=virtio-console parameter to the --serial option.
Also add support for the serial earlycon option, which allows using
virtio-console as the main console device with a traditional serial
device as the early console. This allows logging during early boot
before PCI device discovery (when virtio-console devices are set up).
BUG=chromium:1059924
TEST=crosvm run -r vm_rootfs.img \
--serial hardware=serial,type=stdout,console=false,earlycon=true \
--serial hardware=virtio-console,type=stdout,console=true,stdin=true \
vm_kernel
Change-Id: Iff48800272b154d49b1da00f3914799089268afe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2127322
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Split the serial code into two parts:
- Configuration and setup: arch/src/serial.rs
- Serial device emulation: devices/src/serial.rs
No change in functionality - this is just preparation for generalizing
the command line parsing/setup code so that it can be used with virtio
console devices as well.
BUG=chromium:1059924
TEST=emerge-nami crosvm
TEST=emerge-kevin crosvm
Change-Id: I0aaf9dd6f8096eac4a17077ab5bf569f57d64ff5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2127319
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Previously the "acpi=off" in cmdline has disabled the ACPI for the
guest kernel. With removing the "acpi=off", the ACPI will be enabled
for the guest kernel by default. With acpi enabled, the SCI irq will
be needed by the ACPI core driver. Register the SCI irq in MP table
so that it can use IO-APIC routing.
The reason to have "pci=noacpi" is that, in the current DSDT there is
only suspend capability, so PCI scan still need to be done by the
traditional way.
BUG=chromium:1018674
TEST=Linux guest is able to boot up with the virtio devices functional.
Also able to see the S1 capability from kernel dmesg.
Change-Id: Id54e788f4aa4c944fac5e3fa1c92b76865dd5021
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2078967
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
rustc now warns about return statements that have an extra set of
parenthesis. Remove such instances so that the code is warning free.
TEST=cargo build completes without warnings
Change-Id: I55148f8aceca8ba90f6bead2b6929e2c843351aa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2104767
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Devices use irqfd to inject interrupts, we listen to them in the main
thread and activate userspace pic/ioapic accordingly.
BUG=chromium:908689
TEST=lanuch linux guest with `--split-irqchip` flag
Change-Id: If30d17ce7ec9e26dba782c89cc1b9b2ff897a70d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1945798
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Zhuocheng Ding <zhuocheng.ding@intel.corp-partner.google.com>
S1 is a sleep state which is lighter than S3, but enough to put the devices
into the suspended state.
With this DSDT, the guest kernel is able to see the S1 capability and to
put the VM into virtual S1. During the virtual S1, guest kernel will call
each suspend callbacks of the devices driver to put the devices into the
suspend state, including the pass through device.
BUG=chromium:1018674
TEST=boot linux guest with ACPI enabled, and able to see "shallow" by
"cat /sys/power/mem_sleep", which means the S1
Change-Id: I232609f6f2474895fd9ec4046d88236c413e51af
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2035353
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
sci_irq can be allocated so not to use the fixed number 9.
Actually this irq is not used for injecting any event but
the Linux guest OS requires to see meaning value from the
FADP table. So just fill it to satisfy.
BUG=chromium:1018674
TEST=None
Change-Id: If3ea3bb2844fc7fc1c24a577b7098d2a3e6f1c7f
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2035352
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Add acpi_rsdp_addr in boot_params to allow crosvm to pass
a physicall address of RSDP to the Linux guest kernel, so
that the linux guest kernel can parse the constructed ACPI
tables and enable the ACPI.
Although there is ACPI tables but as we still have "acpi=off"
in command line parameter, there is still no ACPI in guest kernel.
The ACPI construction refers to the implementation of the
Cloud-hypervisor commit:
- arch: x86_64: Generate basic ACPI tables
BUG=chromium:1018674
TEST=None
Change-Id: Ibcb2ae98c43da8ef8c07a07eda9213f61570d14c
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2035351
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Use the Rust __cpuid and __cpuid_count intrinsics to replace the C
implementation in host_cpuid.c.
These are defined in core, but they are also re-exported in std, despite
being undocumented there due to technical reasons:
https://github.com/rust-lang/rust/pull/57808#issuecomment-457390549
Use the std version for consistency (we don't currently use anything
from core anywhere else in crosvm).
BUG=None
TEST=cargo test -p x86_64
TEST=Boot crosvm on x86_64
Change-Id: Ic7a1094d1b804304a2944f8ee1fe55c5e2db23e9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2067159
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This change implements MSI routing and injection, so that service_irq
can actually inject an interrupt into guest.
BUG=chromium:908689
TEST=Unit tests in file.
Change-Id: I2db4f00f569db56f5765c707faaa87c64fd3da9f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1945795
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zhuocheng Ding <zhuocheng.ding@intel.corp-partner.google.com>
For suspend request from VM, will write suspend event and notify
crosvm main process to pause VCPUs.
For resume request, it is not from VM itself but by the resume
command through crosvm socket. Resume request will notify the PM
device to fill its wakeup registers with wakeup event so that
when VCPUs start to run, VM can know there is wakeup from outside.
BUG=chromium:1018674
TEST=cargo test -p devices
Change-Id: I4724ffee10150065a62bf520076c16cbc70b7749
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2035169
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Add ACPI PM resource emulation code in devices, so that it can support
the ACPI PM requestion from guest OS.
BUG=chromium:1018674
TEST=cargo test -p devices
Change-Id: I7b82b1c3a6f609136e493b55420b947afd1d5cfc
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2035168
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Adds support for pstore on ARCVM on x86_64.
The backend file of the buffer will be passed via argument of the crosvm.
BUG=b:144962428
TEST=kernel crash on eve-arcvm, check /sys/fs/pstore/console-ramoops-0
Launch crostini manually on eve-arcvm
Change-Id: I29492ac7a9067aa2ae23eb03fbb942ab7dd3aa8d
Signed-off-by: Kansho Nishida <kansho@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1973391
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Kansho Nishida <kansho@chromium.org>
The extra parens crept back in during a recent refactoring.
Change-Id: Iaba13ddea9b7bada09f6079db7e7f8133cbfc896
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1994726
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Tested-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
The only device that used user_command was Serial. This change makes
Serial device use a thread to read from its input instead of using
user_command.
BUG=chromium:1033787
TEST=./build_test
run crosvm with stdio serial with and without sandbox
Change-Id: Ia0f2ee83d94ad2fee3f1f4f89aa734b976e33507
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1966435
Tested-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Auto-Submit: Zach Reizner <zachr@chromium.org>
rust 1.40 has a new warning when there are extra parens, soRemove them.
Change-Id: Ibb565cac41ba8d72879f4cb8b949f2be30e55167
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1978140
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Support TSC deadline mode of LAPIC timer, this can potentially increase
the precision of guest timer.
BUG=None
TEST=launch linux guest and run `lscpu`, tsc_deadline_timer is present
in the output.
Change-Id: I7adc87827a51ba8d1866ebee201759f2769ba664
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1951429
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zhuocheng Ding <zhuocheng.ding@intel.corp-partner.google.com>
The PIT implementation has the assumption that addresses are I/O port
numbers, so we should use full address mode. i8042 is also changed to
full address mode to avoid the conflict on port 0x61.
BUG=chromium:908689
TEST=None
Change-Id: Ibbb851e3a46ac7fc71576990a1618196de92e33c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1945794
Commit-Queue: Zhuocheng Ding <zhuocheng.ding@intel.corp-partner.google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
When vfio pass-through is enabled, guest will be very slow. The root
casue is gfn is uncachable in EPT.
From the comments in kernel vmx_get_mt_mask(vcpu, gfn, is_mmio)
function, EPT memory type with VT-d, VT-d without snooping control
feature: can't guarantee the result, try to trust guest through
kvm_mtrr_get_guest_memory_type(vcpu, gfn).
But crosvm doesn't set mtrr, so host kernel will set uncachable for all
gfn in ept.
This patch set the default cache type as WB, and set mmio cache type as
UC, so the guest ram is WB.
BUG=chromium:992270
TEST=crosvm --vfio /sys/devices/pci0000:00/0000:00:02.0, pass through
host igd into linux guest, the guest runs smoothly and guest desktop
could be shown on physical local display.
Change-Id: I151aae7835910cfbc9e38464ee901e5da281de1e
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1813458
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
noacpi is not used by the current guest linux kernel to disable ACPI.
Instead, acpi=off is the right parameter to be used.
BUG=chromium:1026497
TEST=launch crosvm linux guest and ACPI is disabled
Change-Id: I9c9001146abb57ea9dbc078ee6188b8c60cb056e
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1925999
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Use 64bit flag in vfio device's bar to get correct mmio allocator.
BUG=chromium:992270
TEST=none
Change-Id: I8f3dab48eb6dc0b92071803aa3526cadda8034c7
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1581143
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Since unified allocator is used to allocate mmio, this patch remove the
device memory name, and rename device to mmio.
BUG=chromium:992270
TEST=this patch doesn't change function, run build_test
Change-Id: I234b0db4b3c5de8cfee372ace5212a980564d0c7
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1895234
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
When guest ram >= 4G, as mmio hole exists in ram GuestMemory,
GuestMemory->end_addr() is larger than memsize, if memsize is used as
start address of device memory, device memory will overlap with Guest ram.
This patch use GuestMemory->end_addr() as the start address of device
memory.
BUG=None
TEST=Boot vm with guest memory above 4G, and enable vGPU, and run
vGPU benchmark.
Change-Id: Ifc28f3a022cb0a179d16fee4056016a192f2acbd
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1895232
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
When guest boot with -m 4096, guest e820 is:
BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff] usable
BIOS-e820: [mem 0x0000000000200000-0x00000000cfffffff] usable
so guest usable ram is 3.25G which is smaller than specified 4G.
3.25G~4G is assigned to pci device as mmio, this range should be
relocated to 4G above like 4G to 4.75G. So guest could see the full 4G
usable ram.
With this patch, guest e820 is:
BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff] usable
BIOS-e820: [mem 0x0000000000200000-0x00000000cfffffff] usable
BIOS-e820: [mem 0x0000000100000000-0x000000012fffffff] usable
The guest could use 4G ram equal to specified 4G.
Then mmio hole exists in guest ram's regions, GuestMemory's end_addr
is larger than the memsize. end_addr couldn't be used to judge an
address in a guest memory or not We should iterate all the regions
to avoid the address in the hole; end_addr couldn't be used for
checked_offset() also, it may faill into mmio hole.
BUG=none
TEST=build_test; Boot vm with different guest memory size, and check
vm's e820 table
Change-Id: I2cd7c3223173ab635041875b9d8b49c2800c8dab
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1895231
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This change plumbs the jail throughout the arch specific device creation
process. It also adds a custom callback support for the ProxyDevice so
that the main process can interrupt the child serial process when it has
incoming bytes.
TEST=crosvm run
BUG=None
Change-Id: I6af7d2cb0acbba9bf42eaeeb294cee2bce4a1f36
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1752589
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Zach Reizner <zachr@chromium.org>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Adds support for virtio-pmem device as an alternative for virtio-blk.
Exposing disk image to guest as virtio-blk device results in both guest
and host independently caching the disk I/O. Using virtio-pmem device
allows to mount disk image as direct access (DAX) in the guest and thus
bypass the guest cache. This will reduce memory foodprint of the VMs.
BUG=None
TEST=cargo test
TEST=Boot patched termina kernel in crosvm; mount virtio-pmem device as
DAX and run xfstests.
Change-Id: I935fc8fc7527f79e5169f07ec7927e4ea4fa6027
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1605517
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Commit-Queue: Jakub Staroń <jstaron@google.com>
This manifested itself in a couple places that were turning shared
memory buffers into slices for the purposes of passing these slices to
`Read` and `Write` trait methods.
However, this required the removal of the methods that took `Read` and
`Write` instances. This was a convenient interface but impossible to
implement safely because making slices from raw pointers without
enforcing safety guarantees causes undefined behaviour in Rust. It turns
out lots of code in crosvm was using these interfaces indirectly, which
explains why this CL touches so much.
TEST=crosvm run
BUG=chromium:938767
Change-Id: I4ff40c98da6ed08a4a42f4c31f0717f81b1c5863
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1636685
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
The --bios argument is added as an alternative to the kernel positional
argument. The BIOS runs in unreal mode (16-bit cs selector set to the
end of 32-bit address space), which matches the default state KVM puts
the segment and data registers into.
Example usage:
Build u-boot with "make qemu-x86_defconfig && make"
Run crosvm with "crosvm_wrapper.sh run --bios=u-boot.rom"
This produces the following message:
"""
U-Boot 2019.01-00017-gdc76aabe6a-dirty (May 21 2019 - 12:17:02 -0700)
CPU:
DRAM: 16 MiB
unable to get online cpu number: -19
Warning: MP init failure
Model: QEMU x86 (I440FX)
Net: No ethernet found.
error: can't find etc/table-loader
Hit any key to stop autoboot: 0
=>
"""
At this point the u-boot shell works with stdin/stdout, but virtual
disks passed with --rwdisk weren't immediately visible from running
"virtio scan" and "virtio info".
This change puts the bios loading together with the linux kernel loading
code since there is a lot of overlap in functionality.
Bug: b/133358982
Test: ./crosvm_wrapper.sh run --mem=4097 --bios=u-boot.rom
Change-Id: I65b0e1044233af662a642c592d35b106217f3c13
Reviewed-on: https://chromium-review.googlesource.com/1622648
Commit-Ready: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This matches the QEMU CMOS implementation and is used by BIOSes to
determine the valid memory regions to add to the e820 map.
BUG=b:133358982
TEST=Boot u-boot qemu build; observe memory size
Change-Id: I27956bc05738b5dd5b84240d5137cb06846aaab9
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1625330
Tested-by: kokoro <noreply+kokoro@google.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Resolve a couple of minor clippy warnings:
- const implies static lifetime, so it can be omitted
- dereference bytes of str instead of clone()
BUG=None
TEST=bin/clippy
TEST=cargo build; boot vm_kernel+vm_rootfs.img
Change-Id: I29ff9bf7fdecd64286c2199e8e45c21103de9ce1
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1618284
Tested-by: kokoro <noreply+kokoro@google.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
This matches behavior of other bootloaders (grub2, iPXE), and the kernel
seems to be relying on this; decompression of the initrd fails if the
initrd is loaded right after the kernel as before, but succeeds if
loaded at the maximum address.
BUG=None
TEST=Boot Debian kernel + initrd on workstation
Change-Id: If7712efb05f55ef413a419dfe276ed3f68c335b7
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1616989
Tested-by: kokoro <noreply+kokoro@google.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
This change allows an output to be set for each serial device for a
guest machine (stdout, syslog, or sink).
BUG=chromium:953983
TEST=FEATURES=test emerge-sarien crosvm; cd sys_util; cargo test;
./build_test; manual testing on x86_64 and aarch_64
Change-Id: I9e7fcb0b296c0f8a5aa8d54b1a74ae801f6badc8
Reviewed-on: https://chromium-review.googlesource.com/1572813
Commit-Ready: Trent Begin <tbegin@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Trent Begin <tbegin@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
The current kernel loader expects an extracted ELF kernel; this adds
complexity to the build and test process for the guest kernel, since the
normal output of a Linux kernel build is a bzImage-format kernel.
bzImage also supports compressed kernels, which are smaller on disk and
potentially quicker to load, depending on disk and CPU speed.
Add support for loading of bzImage-format kernels, and use the 64-bit
boot protocol as described in the official Linux/x86 boot protocol:
https://www.kernel.org/doc/Documentation/x86/boot.txt
The existing ELF loader is kept for compatibility with shipping kernel
images; if a kernel image doesn't have the ELF signature, it is passed
to the bzImage loader as a fallback.
BUG=None
TEST=Boot bzImage and extracted ELF kernels on x86-64
Change-Id: I90be4cd597d15bc89e63f0f6cbc781c5c8c2eaeb
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1609969
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Renames field memory_mb to memory_size. All usages of this
field treat it as a memory size in bytes, not megabytes.
BUG=None
TEST=cargo check
TEST=cargo check --package aarch64 --target aarch64-unknown-linux-gnu
Change-Id: I7b1aefe4f0b612d5eeb2987dc2a0fce6db0dd228
Reviewed-on: https://chromium-review.googlesource.com/1585617
Commit-Ready: Jakub Staroń <jstaron@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
A few files were missing license blurbs at the top, so update them all
to include them.
BUG=none
TEST=none
Change-Id: Ida101be2e5c255b8cffeb15f5b93f63bfd1b130b
Reviewed-on: https://chromium-review.googlesource.com/1577900
Commit-Ready: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
SMBIOS allows to pass down system information from the BIOS to the OS.
Its information is used on Linux to construct modalias entries for the
system in order to facilite module autoloading on specific hardware.
Adding it also allows package management software to target specific
packages when crosvm is used as the hypervisor (e.g. to pre-install
the helper daemons or a special vTPM driver).
This change has only been tested with Linux and implements the bare
minimum necessary to make a crosvm hypervisor detectable through DMI
data. As such it also skips over some required structures like BIOS
information that do not technically apply. The result is a hodgepodge
of standards: SMBIOS 3.0 provides a convenient 64-bit entrypoint
that we implement. However the structures are cut short to SMBIOS 2.0
standards as most of the fields are skipped. Linux deals just fine
with this, although some of the dmi/id files in sysfs will be empty
as a result.
The resulting modalias looks like this:
dmi:bvncrosvm:bvr0:bd:svnChromiumOS:pncrosvm:pvr:
The kernel prints this as part of startup:
SMBIOS 3.2.0 present.
DMI: ChromiumOS crosvm, BIOS 0
And for oops/panic:
Hardware name: ChromiumOS crosvm, BIOS 0
dmidecode's view on the tables (which uses its own parser):
Getting SMBIOS data from sysfs.
SMBIOS 3.2.0 present.
Table at 0x000F0018.
Handle 0x0001, DMI type 0, 20 bytes
BIOS Information
Vendor: crosvm
Version: 0
Release Date: Not Specified
ROM Size: 64 kB
Characteristics:
PCI is supported
System is a virtual machine
Handle 0x0002, DMI type 1, 27 bytes
System Information
Manufacturer: ChromiumOS
Product Name: crosvm
Version: Not Specified
Serial Number: Not Specified
UUID: Not Settable
Wake-up Type: Reserved
SKU Number: Not Specified
Family: Not Specified
TEST=cargo test
Change-Id: Ie27105711a9bc14941d387b720da350349dff265
Reviewed-on: https://chromium-review.googlesource.com/1571565
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This CL fixes four cases of what I believe are undefined behavior:
- In vhost where the original code allocates a Vec<u8> with 1-byte
alignment and casts the Vec's data pointer to a &mut vhost_memory
which is required to be 8-byte aligned. Underaligned references of
type &T or &mut T are always undefined behavior in Rust.
- Same pattern in x86_64.
- Same pattern in plugin::vcpu.
- Code in crosvm_plugin that dereferences a potentially underaligned
pointer. This is always undefined behavior in Rust.
TEST=bin/clippy
TEST=cargo test sys_util
Change-Id: I926f17b1fe022a798f69d738f9990d548f40c59b
Reviewed-on: https://chromium-review.googlesource.com/1566736
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
AddressRanges' name doesn't suggest that it's a SystemAllocator builder.
This CL renames it to SystemAllocatorBuilder, and adds a
SystemAllocator::builder() that removes the need to have a separate
import for the Builder.
A minor change, but it cleans up the interface a bit.
BUG=chromium:936567
TEST=cargo test -p resources && cargo build
Change-Id: I6d14368490c0d3c4018858f541e4ae5390995878
Reviewed-on: https://chromium-review.googlesource.com/1540398
Commit-Ready: Daniel Prilik <prilik@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Before the new borrow checker in the 2018 edition, we sometimes used to
have to manually insert curly braced blocks to limit the scope of
borrows. These are no longer needed.
Details in:
https://doc.rust-lang.org/edition-guide/rust-2018/ownership-and-lifetimes/non-lexical-lifetimes.html
TEST=cargo check --all-features
TEST=local kokoro
Change-Id: I59f9f98dcc03c8790c53e080a527ad9b68c8d6f3
Reviewed-on: https://chromium-review.googlesource.com/1568075
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
In Rust 2018 edition, `extern crate` is no longer required for importing
from other crates. Instead of writing:
extern crate dep;
use dep::Thing;
we write:
use dep::Thing;
In this approach, macros are imported individually from the declaring
crate rather than through #[macro_use]. Before:
#[macro_use]
extern crate sys_util;
After:
use sys_util::{debug, error};
The only place that `extern crate` continues to be required is in
importing the compiler's proc_macro API into a procedural macro crate.
This will hopefully be fixed in a future Rust release.
extern crate proc_macro;
TEST=cargo check
TEST=cargo check --all-features
TEST=cargo check --target aarch64-unknown-linux-gnu
TEST=local kokoro
Change-Id: I0b43768c0d81f2a250b1959fb97ba35cbac56293
Reviewed-on: https://chromium-review.googlesource.com/1565302
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
To avoid wasting time re-sorting these things (CL:1492612).
https://docs.rs/remain
Disclaimer: I wrote the macro.
This CL adds #[sorted] attributes to those Error enums that seemed to
have made some effort to be in sorted order.
TEST=cargo check
TEST=cargo check --all-features
TEST=cargo check --target aarch64-unknown-linux-gnu
TEST=emerge-nami crosvm
TEST=local kokoro
CQ-DEPEND=CL:1524247
Change-Id: I89685ced05e2f149fa189ca509bc14c70aebb531
Reviewed-on: https://chromium-review.googlesource.com/1515998
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
This allows setting the affinity of the VCPU threads to specific host
CPUs. Note that each individual CPU has its affinity set to the full
set of CPUs specified, so the host kernel may still reschedule VCPU
threads on whichever host CPUs it sees fit (within the specified set).
BUG=chromium:909793
TEST=build_test
Change-Id: I09b893901caf91368b64f5329a6e9f39027fef23
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1554865
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
This may help reduce cases of conflicts between independent CLs each
appending a dependency at the bottom of the list, of which I hit two
today rebasing some of my open CLs.
TEST=cargo check --all-features
Change-Id: Ief10bb004cc7b44b107dc3841ce36c6b23632aed
Reviewed-on: https://chromium-review.googlesource.com/1557172
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Found by running: `cargo rustc -- -D bare_trait_objects`
Bare trait objects like `&Trait` and `Box<Trait>` are soft-deprecated in
2018 edition and will start warning at some point.
As part of this, I replaced `Box<Trait + 'static>` with `Box<dyn Trait>`
because the 'static bound is implied for boxed trait objects.
TEST=cargo check --all-features
TEST=cargo check --target aarch64-unknown-linux-gnu
TEST=local kokoro
Change-Id: I41c4f13530bece8a34a8ed1c1afd7035b8f86f19
Reviewed-on: https://chromium-review.googlesource.com/1513059
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
Separated out of CL:1513058 to make it possible to land parts
individually while the affected crate has no other significant CLs
pending. This avoids repeatedly introducing non-textual conflicts with
new code that adds `use` statements.
TEST=cargo check
TEST=cargo check --all-features
TEST=cargo check --target aarch64-unknown-linux-gnu
Change-Id: Iec5cc762f38f18196a6147473ac093f474b00794
Reviewed-on: https://chromium-review.googlesource.com/1520075
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
Building off CL:1290293
Instead of having a seperate GuestMemoryManager, this adds SharedMemory
as a Arc'd member of GuestMemory. This is nice since it removes the need
to plumb the Manager struct throughout the codebase.
BUG=chromium:936567
TEST=cargo test -p sys_util
Change-Id: I6fa5d73f7e0db495c2803a040479818445660345
Reviewed-on: https://chromium-review.googlesource.com/1493013
Commit-Ready: Daniel Prilik <prilik@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Previously, the getter and setter functions generated for a bitfield
struct by #[bitfield] all operated on primitive types like bool, u8, u16
etc.
This CL adds support for getters and setters defined in terms of
user-defined enums.
We make an enum bitfield-compatible by adding #[bitfield]. The number of
variants must be a power of 2.
#[bitfield]
enum TwoBits {
Zero = 0b00,
One = 0b01,
Two = 0b10,
Three = 0b11,
}
And then it may be used to specify a field in a bitfield struct.
#[bitfield]
struct Struct {
prefix: BitField1,
two_bits: TwoBits,
suffix: BitField5,
}
The generated getters and setters for this struct would have the
following signatures:
impl Struct {
fn get_prefix(&self) -> u8;
fn set_prefix(&mut self, val: u8);
fn get_two_bits(&self) -> TwoBits;
fn set_two_bits(&mut self, val: TwoBits);
fn get_suffix(&self) -> u8;
fn set_suffix(&mut self, val: u8);
}
TEST=`cargo test` the bit_field and bit_field_derive crates
TEST=`cargo check` crosvm
Change-Id: Ibc8923e2877fda6ae8da5767731edcb68721a434
Reviewed-on: https://chromium-review.googlesource.com/1519686
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
This is an easy step toward adopting 2018 edition eventually, and will
make any future CL that sets `edition = "2018"` this much smaller.
The module system changes in Rust 2018 are described here:
https://doc.rust-lang.org/edition-guide/rust-2018/module-system/path-clarity.html
Generated by running:
cargo fix --edition --all
in each workspace, followed by bin/fmt.
TEST=cargo check
TEST=cargo check --all-features
TEST=cargo check --target aarch64-unknown-linux-gnu
Change-Id: I000ab5e69d69aa222c272fae899464bbaf65f6d8
Reviewed-on: https://chromium-review.googlesource.com/1513054
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
Avoiding Box<dyn Error> makes it less likely that we display errors with
insufficient context by accident.
Many of the errors touched in this CL already had helpful message
written! But those corresponding enum variants were never being
instantiated, and that bug was masked by Box<dyn Error>. For example see
the Error::LoadCmdline and Error::LoadKernel.
pub enum Error {
LoadCmdline(kernel_loader::Error),
...
}
Before this CL:
// Bug: boxes the underlying error without adding LoadCmdline
kernel_loader::load_cmdline(...)?;
After this CL:
kernel_loader::load_cmdline(...).map_err(Error::LoadCmdline)?;
TEST=cargo check
TEST=cargo check --all-features
TEST=cargo check --target aarch64-unknown-linux-gnu
Change-Id: I7c0cff843c2211565226b9dfb4142ad6b7fa15ac
Reviewed-on: https://chromium-review.googlesource.com/1502112
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
This changes the default Linux kernel command line from panic=1 (reboot
one second after panic) to panic=-1 (reboot immediately on panic). The
kernel should not normally panic; this is just to improve quality of
life for developer workflows, such as running bash as init and exiting
the shell to shut down the VM.
BUG=None
TEST=crosvm run -r vm_rootfs.img -p init=/bin/bash vm_kernel; exit shell
Change-Id: I7c9084ccf1786cd4455fd748512078e02fdb17fa
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1500872
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
The description method is deprecated and its signature forces less
helpful error messages than what Display can provide.
BUG=none
TEST=cargo check --all-features
TEST=cargo check --target aarch64-unknown-linux-gnu
Change-Id: I27fc99d59d0ef457c5273dc53e4c563ef439c2c0
Reviewed-on: https://chromium-review.googlesource.com/1497735
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Rename functions and parameters that had 'virtio' in their names
because we also create non-virtio devices like audio.
BUG=none
TEST=emerge-eve crosvm and deploy it to the device, verify some of
devices are still created at /sys/bus/virtio/devices/
Change-Id: I3ea75159a865e5f00ecef349725b3c12f94afaca
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1480739
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Tolnay <dtolnay@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Based on Linux boot protocol references:
- x86: Documentation/x86/boot.txt
- arm: Documentation/devicetree/bindings/chosen.txt
BUG=None
TEST=Boot Alpine Linux netboot initrd on x86_64 and aarch64
Change-Id: If4730765638f0a0b8bb8f63203c98e4765a354ee
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1407221
Tested-by: kokoro <noreply+kokoro@google.com>
This will allow placement of the initrd after the end of the device tree
blob in the next patch.
This also moves the load of the fdt into setup_system_memory() so that
the position of the initrd can be calculated (in the next patch) before
calling configure_system().
BUG=None
TEST=Boot Termina on x86-64
Change-Id: I6dcfce3aa48ae0932157a40fa28ea9fb384263c8
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1443634
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
This device tree is derived from the Android fstab file which is
provided via command line flag.
BUG=chromium:922737
TEST=None
CQ-DEPEND=CL:1415390
CQ-DEPEND=CL:1415270
Change-Id: Idd007c844f84cab3ff37be16a718f14e5f630312
Reviewed-on: https://chromium-review.googlesource.com/1370058
Commit-Ready: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Each device (Bus, Pci, Proxy, etc), gets a debug label associated with
it. When a child is spawned, the debug label for it is stored in
a map with the child's pid as the key. If a SIGCHLD is handled, this map
is used to print a more helpful message about exactly which child died.
BUG=None
TEST=run with sandboxing and a faulty child device
check logs for message about child died
the child should have a debug label
Change-Id: I61fbbee0a8e701249533a7a3a6a1ad48840f12e5
Reviewed-on: https://chromium-review.googlesource.com/1432835
Commit-Ready: Chih-Yang Hsia <paulhsia@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
To support eclass migration for crosvm ebuild from crate to cros-rust.
This CL need to be built with cros-rust version crosvm ebuild.
- Upgrage crate cc from 1.0.15 to 1.0.25.
- Change local tempdir version from 0.3.5 to 0.3.7 for ebuild
integration.
- Remove 9s directory since it's moved to platform2.
BUG=chromium:781398
BUG=chromium:907520
TEST=Run $ FEATURES=test emerge-eve crosvm
in a clean chroot
CQ-DEPEND=CL:1421303
Change-Id: Iab615b555a51f8020e5efae1cc40ac6b54ea87f2
Reviewed-on: https://chromium-review.googlesource.com/1421237
Commit-Ready: Chih-Yang Hsia <paulhsia@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Chih-Yang Hsia <paulhsia@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
We updated the production toolchain from 1.30 to 1.31 in CL:1366446.
This CL does the same upgrade for the local developer toolchain and
Kokoro.
The relevant changes are in rust-toolchain and kokoro/Dockerfile.
The rest are from rustfmt.
TEST=cargo fmt --all -- --check
TEST=as described in kokoro/README.md
Change-Id: I3b4913f3e237baa36c664b4953be360c09efffd4
Reviewed-on: https://chromium-review.googlesource.com/1374376
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: David Tolnay <dtolnay@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
This CL adds a crate `sync` containing a type sync::Mutex which wraps
the standard library Mutex and mirrors the same methods, except that
they panic where the standard library would return a PoisonError. This
API codifies our error handling strategy around poisoned mutexes in
crosvm.
- Crosvm releases are built with panic=abort so poisoning never occurs.
A panic while a mutex is held (or ever) takes down the entire process.
Thus we would like for code not to have to consider the possibility of
poison.
- We could ask developers to always write `.lock().unwrap()` on a
standard library mutex. However, we would like to stigmatize the use
of unwrap. It is confusing to permit unwrap but only on mutex lock
results. During code review it may not always be obvious whether a
particular unwrap is unwrapping a mutex lock result or a different
error that should be handled in a more principled way.
Developers should feel free to use sync::Mutex anywhere in crosvm that
they would otherwise be using std::sync::Mutex.
TEST=boot linux
Change-Id: I9727b6f8fee439edb4a8d52cf19d59acf04d990f
Reviewed-on: https://chromium-review.googlesource.com/1359923
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Hopefully the changes are self-explanatory and uncontroversial. This
eliminates much of the noise from `cargo clippy` and, for my purposes,
gives me a reasonable way to use it as a tool when writing and reviewing
code.
Here is the Clippy invocation I was using:
cargo +nightly clippy -- -W clippy::correctness -A renamed_and_removed_lints -Aclippy::{blacklisted_name,borrowed_box,cast_lossless,cast_ptr_alignment,enum_variant_names,identity_op,if_same_then_else,mut_from_ref,needless_pass_by_value,new_without_default,new_without_default_derive,or_fun_call,ptr_arg,should_implement_trait,single_match,too_many_arguments,trivially_copy_pass_by_ref,unreadable_literal,unsafe_vector_initialization,useless_transmute}
TEST=cargo check --features wl-dmabuf,gpu,usb-emulation
TEST=boot linux
Change-Id: I55eb1b4a72beb2f762480e3333a921909314a0a2
Reviewed-on: https://chromium-review.googlesource.com/1356911
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Legacy PCI interrupts should be level triggered, not edge triggered.
The reverted change was done as part of a series of patches during
debugging of virtio-pci differences from virtio-mmio, but this was not
the actual root cause of the problems.
BUG=None
TEST=Boot crosvm on x86-64 and verify virtio devices still work
This reverts commit 9357ceab6a.
Change-Id: If1bf6e48d63fe352f0b914f5bdb2e346ab210369
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1297840
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Make the Minijail part of the PCI device tuple optional so that an empty
jail is not created for --disable-sandbox.
BUG=None
TEST=Boot crosvm in both --multiprocess and --disable-sandbox modes
Change-Id: Ibb3f2dbf33ca19910ee7448ea823b2772e09ecc5
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1290289
Reviewed-by: Dylan Reid <dgreid@chromium.org>
This reverts commit c8986f14a8.
Re-land the virtio PCI conversion after the preceding fixes.
BUG=chromium:854766
TEST=Boot crosvm on nami and kevin
Change-Id: I3699e3ed1a45cecc99c51e352d0cf0c32bc4116f
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1265862
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Now that cargo fmt has landed, run it over everything at once to bring
rust source to the standard formatting.
TEST=cargo test
BUG=None
Change-Id: Ic95a48725e5a40dcbd33ba6d5aef2bd01e91865b
Reviewed-on: https://chromium-review.googlesource.com/1259287
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
This reverts commit d635acbaf3.
This commit seems to be responsible for introducing hung tasks in tests,
so let's revert it for now to get the tests green and debug it offline.
BUG=chromium:891806
TEST=None
Change-Id: I83504058baeae00909d9fb4f4bb704a144a0dfaf
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1259408
Reviewed-by: Dylan Reid <dgreid@chromium.org>
