To add support for pcie switch, we need to make crosvm support pci
device tree. This patch introduces a new structure PciBus which
stores topology information of a pci bus using a tree-like structure,
so that we can handle bridge window/MMIO allocation properly before
boot up. That is, we have to allocate device MMIO based on their
pre-order in the device tree, otherwise some pci bridge's bridge
window would intersect and guest won't boot. This PciBus structure
is stored in PciRoot later, make it possible for us to modify pci
topology during runtime.
BUG=b:199986018
TEST=run crosvm to see if pci device model has any issues
Change-Id: Ieb677cb7787650804051c43355ba27ce7926819a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3503103
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The AddressRange type is used for representing contiguous memory or I/O
address ranges, mostly equivalent to RangeInclusive<u64> but with the
added benefit of implementing Copy and not carrying an extra field used
only for iteration, which we don't need.
Using an inclusive range means we can represent the full address space
with no weird corner cases around the upper limit of the range (for
example, an AddressRange covering the full 64-bit space can be
represented as start: 0, end: u64::MAX).
AddressRange also replaces the previous MemRegion type, which was a
start/size pair.
This normalizes the interface of the resources crates to use
AddressRange rather than a start/size pair; more cleanups throughout the
tree may be possible, but this commit attempts to be somewhat smaller to
have a hope of being reviewable.
BUG=b:222769529
TEST=tools/presubmit --all
TEST=cargo test -p resources
Change-Id: I8c90bdc28456221b5107ef7e589233315ea739c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3696671
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Replace --no-legacy flag, which implied the removal of both i8042 and
rtc devices, with separate --no-i8042 and --no-rtc flags. The old
flag is still supported and implies the other two.
Because the original landing of this flag didn't protect it as an x86
specific option, this change just leaves that alone. But the new flags
are added as x86-only, because they are very x86 specific.
BUG=b:223443221
TEST=crosvm run --bios u-boot.rom --disk kernel
Change-Id: I4bbea2d0a38fdd3a5d69d12ca79fa360f0460358
Signed-off-by: Alistair Delva <adelva@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3510982
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Add Goldfish battery to aarch64 crosvm. The guest kernel will
see the goldfish battery node on the FDT.
This copies the seccomp policy for the battery from x86-64.
BUG=b:214124318
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
TEST=android-sh -c 'dumpsys battery'
TEST=tast run ${DUT} arc.PerfBoot.vm
Change-Id: I8212e760db5ffbc5d01442cfa7930baa5962ef6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3686713
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Masami Hiramatsu <mhiramat@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Masami Hiramatsu <mhiramat@google.com>
Name the enums instead of bool so that it's easier to reason, and factor
out the MSR loop.
BUG=b:229770963
TEST=build
Change-Id: I7d2306472bdf7482479b40b0ef00f378754a811f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3685671
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Turbostat detects if CPU frequency and temperature features are
supported by reading several CPUID entries bits. Expose these
CPUID bits to guest when enable-pnp-data option is enabled.
Several MSR registers which turbostat depends on have been already
passed through when ITMT is enabled. Adding code to detect this and
avoid to doubly pass through.
BUG=b:229770963
TEST=Run "turbostat" in Chrome OS guest and show correct value.
Change-Id: Ieebaf616d544cb187a80ec6f3313a246ebf54bb2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3641466
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
turbostat shows cpu freq/c-state/thermal statistics data by reading
some related MSRs. Unfortunately some MSRs such as MSR_IA32_POWER_CTL
are already emulated by KVM. The emulated value are not what we want
to expose to Chrome OS guest. KVM_X86_SET_MSR_FILTER ioctl provides
a way to skip KVM's emulation and let user space handle the MSR.
We added two MSR actions "MsrPassthroughFilter" and "MsrEmulateFilter"
to indicate the corresponding MSR needs to be filtered.
BUG=b:229770963
TEST=Run "turbostat" in Chrome OS guest and show correct value.
Change-Id: I5920ddba091589170dc326e10187aec66f75df79
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3641465
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Some non-jailed devices may spawn threads. Do this to prevent threads
interferring with jails
BUG=b:234169724
TEST=run with shared dir locally
Change-Id: I0164a56e4d60ac8358ffc368021cf6b8e9a11eb5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673787
Reviewed-by: Lepton Wu <lepton@chromium.org>
Commit-Queue: Anton Romanov <romanton@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This is a reland of commit 129840471d
Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>
Bug: b:233610263
Change-Id: I2f2125da95e8907f4f0c16930952e9b765d33e6c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671087
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This reverts commit 129840471d.
Reason for revert: This conflicts with https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3600167 breaking the build
Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>
Bug: b:233610263
Change-Id: Ia70540c3041611f59968cb7929b238eecfe2530d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671082
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
This allows for creating a simple write-only debug connection that uses
a single IO port. This method is supported by both bochs and qemu[1].
The main motivation here is to help in improving crosvm's ability to
boot OVMF, which makes use of this simple debug device on port 0x402.
For that one would use `--serial
type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
Note that serde_keyvalue doesn't support parsing hex values, hence the
need to use `1026`, but I intend to address that as well to allow the
more natural `debugcon_port=0x402` phrasing.
[1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
BUG=b:233610263
Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Mike Gerow <gerow@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
crosvm waits on events like exit, reset, crash, guest panic etc and
uses eventfd to wait on these events. As of now, we have 4 eventfds
and may increase.
This is an attempt to consolidate all Vm events into one framework.
Use Tube instead of Event to get consistent behavior between OSes.
Implement a wrapper over Tube to have a consistent API for events.
BUG=None.
TEST=Built crosvm. Ran a minimal vm to panic and verified that crosvm
received the panic event. cargo test on devices.
Change-Id: I313d428de5e3ce3b879982f913918ec0a4a72c35
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3480577
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vineeth Pillai <vineethrp@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
To simplify the construction and parsing, and put the impossible values
checking at parameter parsing time.
BUG=b:215297064
TEST=build
Change-Id: Ic601d61a73dba9e3ec40f3589c62a586e1c7a8c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3655032
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
In order to let host and guest have ths similiar pci mmio layout in
manatee, this commit add a pci-start parameter.
BUG=b:197877871
TEST=boot vm with --pci-start and check vm's mmio layout
Change-Id: I0e83dfb3ab3c3b2ea1b0a1554d532e8414924b36
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3578017
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Previous pcie cfg mmio is predefined as constand to avoid conflict with pci mmio,
this has two issues:
a. The size of pcie cfg mmio is limited to 64MB, so the max pci bus number is 64.
This isn't ennough for vfio-pci device, as such device's bus number is same as
host bus number, it may be above 64.
b. In manatee, CrOS may be required to have the same pcie cfg mmio base and size
as host.
So this commit add a parameter and let user could specify pcie cfg mmio base and
size. Then the guest memory layout will be adjusted to avoid conflict between
guest ram and pci low mmio.
BUG=b:197877871
TEST=run crosvm with --pcie-ecam=xxxx,xxxx, check vm's memory layout and pcie
ECAM function
Change-Id: I22cf7e2b3f01ab3f48dff9f5246cb1c24faa9703
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305948
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The old format is like:
--userspace-msr=0x10,action=r0
Now this format can be deprecated. Please use the new format like:
--userspace-msr=0x10,type=r,action=pass,from=cpu0
Also ask the MSR to be handled in crosvm must be unique in order to know
which MSRs have been handled in more complex scenarios.
BUG=b:225375705
TEST=Set `--userspace-msr=0x1a2,type=r,action=pass,from=cpu0`
Change-Id: I3c31affb738c558aaf4da5cea8d17b74428708a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3610843
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Each vcpu has a vcpu->MsrDev file mapping. Instead of trying to create
an instance at first use, just keep an empty map in the beginning.
BUG=b:215297064
TEST=boot volteer-manatee
Change-Id: Ic5a63b0427a6441f190da3917b5f272bbb8ec778
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3611369
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This provides at least a minimal one-line description to show what each
crate is about.
BUG=None
TEST=tools/cargo-doc
Change-Id: I26732e8c29062e622d5be09bdc120a49d564b9fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3630422
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This runs an unprotected VM but uses the same memory layout as for a
protected VM, loads pVM firmware, disables the same devices as for
protected mode. This is useful for debugging pVM firmware and other
protected VM issues.
TEST=crosvm --extended-status run --disable-sandbox --serial=stdout,hardware=serial,num=1 --unprotected-vm-with-firmware=pvmfw --bios=test_bootloader
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
BUG=b:230475926
Change-Id: I9a8077d76874f10221071ea312291659d81da3d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3623760
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
With Intel Turbo Boost Max Technology 3.0, (ITMT), the maximum turbo
frequencies of some cores in a CPU package may be higher than for the
other cores in the same package. In that case, make the scheduler prefer
to run tasks on the CPUs with higher max turbo frequencies, to achieve
better performance.
When vCPUs 1:1 map to pCPUs, ITMT scheduling feature can benefit
performance of Guest. So when user sets `--itmt`, crosvm will check if
`--host-cpu-topology` is set or if `--cpu-affinity` is set for 1:1
mapping.
In kernel, ITMT scheduling feature depends on intel_pstate driver and
ACPI CPPC support.
To setup intel_pstate driver and pass CPPC capability check, we need
emulate related MSRs in userspace:
- MSR_HWP_CAPABILITIES and MSR_TURBO_RATIO_LIMIT: intel_pstate driver
only needs to read. So we passthrough them to Guest. But please note,
to be compatible with the configuration in initramfs, use `FromCPU0`
Temporarily.
- MSR_PM_ENABLE and MSR_HWP_REQUEST: they are MSRs to control HWP.
When intel_pstate driver is initializing, the driver will close/open
HWP by writing into MSR_PM_ENABLE, and the driver also needs to set
performance policy by writing some hints into MSR_HWP_REQUEST.
Note that we don't want Guest's behavior to affect the performance
control of the host, so use 'emulate' handler for them.
- MSR_PLATFORM_INFO: this MSR is emulated in kernel with a fault value
by default. intel_pstate doesn't want this fault value, so we ask
this MSR to exit to userspace and give it a real value.
- MSR_IA32_PERF_CTL: intel_pstate driver use this MSR to set the min
pstate in the initialization. So use 'emulate' handler for this MSR.
Since of `FromCPU0` setting of MSR_HWP_CAPABILITIES, ITMT scheduling
will set the same priority for each core so optimization will not work.
BUG=b:225375705
TEST=Set `--itmt` and check /proc/sys/kernel/sched_itmt_enabled
Change-Id: Icfa85ffa15c3b977c3b62a1f8a379c4c2f5fc49d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3575511
Commit-Queue: Zhao Liu <zhao1.liu@intel.corp-partner.google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
At present, crosvm can support handle RDMSR in userspace by read MSR of
Host directly. This is the RDMSR passthrough in userpace.
This patch adds more MSR handler support, including:
- WRMSR passthrough: write the corresponding MSR of Host directly in
userspace; The control of MSR will work on host;
- RDMSR emulation: crosvm uses a dummy MSR value to let Guest reads on.
This value can be different with real MSR of Host;
- WRMSR emulation: crosvm uses a dummy MSR value to let Guest writes
into. This means the control of MSR won't really work (on Host).
BUG=b:225375705
TEST=Set `--userspace-msr=0x1a2,type=r,action=pass,from=cpu0`
Change-Id: I3276dd651464ef7b695e2ddd433793d59128af9b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3575508
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Motivation behind this is to greatly reduce code duplication and more
streamlined syslog experience.
Integration with log facade allows us to have logs from 3rd party crates
and better integration into rust ecosystem. As well as getting rid of
our log/warn/etc macros.
Notable changes:
* Moving to log's levels: info/trace/debug/error/warn. Note that
none of our code utilizes alert/critical/etc so this is benign
* Moving windows' syslog implementation filtering into
cross-platform scope;
BUG=none
TEST=kokoro
Change-Id: I28b3a34a3ddca21af9cc6d191061681a02314f7b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3588248
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Auto-Submit: Anton Romanov <romanton@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Anton Romanov <romanton@google.com>
Simple rename to emphasize that vcpu_ids are not KVM-specific.
Change-Id: Icaf8a5f15a83021cf48467b0b8d0042ab0ab4a92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3586010
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Moreland <smoreland@google.com>
Update the GDB stub implementation to the 0.6 version of the gdbstub
crate API, attempting to preserve the current behavior as much as
possible. Hardware breakpoints and single stepping still work, but some
existing issues with software breakpoints are still present.
BUG=None
TEST=Manual
Cq-Depend: chromium:3578400
Change-Id: I522242a1a2055ecdf47b2010a615dc9e0136ebd0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3578025
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: David LeGare <legare@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
This implements AsRawDescriptors trait for IrqEdgeEvent and
IrqLevelEvent and updates the users.
BUG=None
TEST=./tools/presubmit
Change-Id: I879531e98396f1eb8e99db73cb00d7b3330101a9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3552317
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
The new specialized functions take IrqEdgeEvent and IrqLevelEvent
arguments, so that callers can use them directly.
BUG=None
TEST=./tools/presubmit
Change-Id: I2e5c5d92a6c292f31ad6cfb8652f0c46f0a7a958
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3548067
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
The new specialized functions take IrqEdgeEvent and IrqLevelEvent
arguments, so that callers can use them directly.
BUG=None
TEST=./tools/presubmit
Change-Id: I2c1272e31f6b20eb22743b003bd23b9c1105cda6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3548066
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
This is in preparation for callers to use IrqEdgeEvent and IrqLevelEvent
and follows general principle in crosvm that if entity needs to hold on
to an event, the entity is responsible for cloning it.
BUG=None
TEST=./tools/presubmit
Change-Id: I9da9a5156108355449b290a2a848257816370fb2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3548064
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
This allows to make the code more concise and gives callers a chance
to act upon errors.
BUG=None
TEST=./tools/presubmit
Change-Id: Ibd9d53270bc21f90fcb44c673d2c7f3763a44c3b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3548063
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
This continues conversion from a pair of Event objects to single
IrqLevelEvent.
BUG=None
TEST=./tools/presubmit
Change-Id: Iec7e94f4c40cc29fa612cc3ae364cc6f8b0d0177
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3548061
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
Use IrqLevelEvent instead of 2 separate event for interrupt handling.
BUG=None
TEST=./tools/presubmit
Change-Id: I56e57044b665565cf1b42831e8ac2240e41bd102
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3536894
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
Make the function take the more versatile slice of string slices,
instead of requiring caller code to generate the dynamic Vec and String
types, which can easily be converted back into those primitive types.
Note: no functional change intended.
BUG=b:227142928
TEST=booted a protected VM from the AOSP fork
Change-Id: I61701700efdacab4cfc5f5dd3df761e06a372065
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3560154
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
crosvm sets up an emulated serial device for ttyS0 as a default device
unless virtio-console is specified.
The setup should be skipped when a vhost-user console is specified as well.
BUG=b:196186396
BUG=b:227407433
TEST=no serial output when one vhost-user console is specified.
Change-Id: Ib17e218fd01a13c109fc1246fd3a6d99031d3181
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3557729
Reviewed-by: Morg <morg@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Wire up GPE eventfd forwarding and crosvm's GPE emulation.
This patch allows to provide ACPIPMResource with the list of GPEs
which should work as direct physical (passthrough) GPEs rather than
purely emulated ones.
BUG=b:205072342
TEST=see CL:3492224
Change-Id: Idb8ef36299c793f56d73246d15ff89f495bb30ef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492223
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Remove the ramoops region from high_mmio when constructing the system
allocator. This means the aarch64 code no longer needs to manually
adjust high_mmio when determining the pci regions.
BUG=b:181736020
TEST=Check arcvm pstore still works
Change-Id: I81ca398a1984f0efb30c0a4d4b620bd50fe9df85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516667
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Have the arch code return the SystemAllocatorConfig instead of a
SystemAllocator. This will be used to allow the core code to apply
additional restrictions on top of the arch code's restrictions.
BUG=b:181736020
TEST=compiles
Change-Id: I4d9ca277f039586e664648492c8744967dcd2ee5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516665
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Support injecting an ACPI fixed power button event using "powerbtn" in
the command line.
BUG=b:199383670
TEST=boot Linux kernel and trigger a power button event
Change-Id: I5ed57f533fa3d91043491fd1f0695223a139fc7a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3350492
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Since we'll be putting all PCI devices on non-root buses behind virtual
PCI-E root ports, MMIO BARs in such devices must be inside the forward
windows of their root ports. This presents additional requirements for
their MMIO BAR allocation:
1. All non-prefetchable BARs must be inside the same 32-bit MMIO window
2. All prefetchable BARs must be inside the same MMIO window, but
different than the non-prefetchable MMIO window
3. Both windows must be 1MB-aligned
4. No other PCI devices should occupy MMIO space in these windows
Allocate the entire window from the system resource allocator to prevent
any space within the window from being used elsewhere. To maximize
memory space efficiency, use VfioResourceAllocator for BAR allocation.
BUG=b:185084350
TEST=passthrough a vfio-pci device with bus_number > 0 and static connet it
behind a pcie root port, then check pcie RP and vfio-pci device function in
guest.
Change-Id: Ic9865afc48eb3ff9fa475dbcfdf90642b012980c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3166888
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Introduce the struct BarRange{addr, size, prefetchable} to indicate the
return of allocate_io|device_bars. So it is readable and easy to use.
BUG=b:185084350
TEST=boot Linux kernel and check dmesg
Change-Id: I0073f20401816f60c131bf15a9bc196e5fcba6d0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3455126
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Fixed ACPI Description Table (FADT) contains Low Power S0 Idle Capable
Flag. This commit introduces "--s2idle" argument allowing to set proper
bit in the guest FADT table. This is required to inform guest OS to use
s2idle instead of traditional S3 power mode.
BUG=b:194391015
TEST=Build crosvm and run "crosvm run --s2idle ..", dump FADT table and
confirm that proper flag was set.
Change-Id: I243bfe2cc4840278fcdbf33dcb147b2eda50856d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3457402
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Grzegorz Jaszczyk <jaszczyk@google.com>
Run tests for sys_util_core, poll_token_derive and balloon_control on
windows.
Using dotfiles to disable/serialize test runs of a subset of crates does
not work well with third party crates as it forces us to commit the dot
file to the crate.
The patch modifies and uses the script that runs linux tests.
This patch also allows us to
- build/test child crate even if parent crate has disabled build/test.
- avoid building crosvm if it is not explicitly specified.
RIP short lived .windows_build_test_skip. You allowed us to run noop
kokoro tests.
Test: py .\tools\impl\test_runner.py --arch x86_64
Bug: b:215610772
Change-Id: Icc6d04ffd7c0c33d4f60aeac16fc7d23881c387d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3459809
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
The patch also adds files to skip building and testing crates on
windows. When we run
```
tools/windows/build_test.py --skip_file_name .windows_build_test_skip
```
the build/test succeeds without actually doing anything as build/test
for all crates is skipped by creating '.windows_build_test_skip'.
Bug: 213170957
Test: Ran script on downstream repo
Change-Id: Iebd2cea463ee722be4feaed88229e1fb5e9fd6c5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3417918
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
Add a function that returns the size of guest physical addresses. This
wraps KVM_CAP_ARM_VM_IPA_SIZE on aarch64 and CPUID to query host
physical address size on x86_64. This replaces the phy_max_address_bits
function from x86_64, and all callers are migrated to use the new Vm
function instead.
BUG=b:210727578
TEST=check on trogdor64 with debug prints
Change-Id: I3107fe6357fcf166b7ad0e2a7c55919705da3b0c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3364971
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This involves two main changes:
* Protected VMs must be created with KVM_VM_TYPE_ARM_PROTECTED.
* pVM firmware is now loaded by IPA rather than memslot ID.
There are also a lot of trivial changes because the ProtectionType enum
was moved from the devices crate to the hypervisor crate.
BUG=b:209794844
TEST=Will tested manually with patched kernel and dummy firmware
Change-Id: I1dd75e20063ca4736f155292ca5f70b94664fdd9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3330204
Auto-Submit: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Since PciRoot has been modified into Arc<Mutex<>>, RunnableLinuxVm->root_config
could be changed from PciConfigArch to PciRoot also, this could simplify code
and reduce two functions from PciConfigArch.
BUG=b:197877871
TEST=tools/presubmit
Change-Id: Ibc18587900d6f8259ac1d6f8fe7b3ea4fedad07e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305942
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Instead of returning 0 for both shutdown and reset/reboot, let's have
shutdown continue returning 0, but reset will now return 32 exit code,
so that callers will have an option to handle this case differently.
BUG=b:3169569
TEST=Examine crosvm exit codes when resetting and shutting down VM
Change-Id: I2c7c11b7f8c8528744f7e25e5d17c6fa9810f409
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3316835
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
PcieRootPort implement hotplug_bus trait, it should be added into
RunnableLinuxVm->hotplug_bus, so create pcie root port when
RunnableLinuxVm->hotplug_bus is ready.
Many hotplug bus may exist, when a hotplug device is added, is_match()
should be called on each hotplug bus before attach that device to
the bus.
BUG=b:185084350
TEST=Boot a vm with passthrough device and check its function
Change-Id: I89dbc091f336b3f9d0435b52963f7cf62d408a67
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2955570
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This change contains the results of running
./tools/contib/cargo_refactor.py
This will break the next uprev, and needs to be synchronizized
with the corresponding ebuild changes in https://crrev.com/c/3248925
BUG=b:195126527
TEST=./tools/run_tests
Change-Id: Ied15a1841887bb8f59fba65b912b81acf69beb73
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3248129
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
At present the Guest generates its own CPU topology. To mitigate
cross-hyperthread speculative execution side channel attacks, allow
Guest to use mirror CPU topology of Host is needed for future scheduling
optimization.
Add a config option "--host-cpu-topology" to ask the vCPU number to be
identical to physical CPUs, and make the vCPU has the same APIC ID in
MADT and CPUID as the corresponding physical CPU. The same APIC ID can
ensure the same topology.
"--host-cpu-topology" requires vCPU number must equal to pCPU number,
and it has the default vCPU number setting, which equals to pCPU number.
"--host-cpu-topology" also defaultly sets CPU affinity for each vCPU to
the pCPU which has the same processor ID, like 1=1:2=2:3=3:4=4, so that
the vCPU and its corresponding pCPU will have the same processor ID and
the same APIC ID. User can't set CPU affinity if "--host-cpu-topology"
was set.
BUG=b:197875305
TEST=Set "--host-cpu-topology" option and check Guest's /proc/cpuinfo,
lscpu, CPUID for different vCPU
Change-Id: Ibc4eb10649e89f43b81bde6d46d6e0e6c7234324
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3217035
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
With vfio pci device hotplug, bus->devices will be inserted and removed at
runtime in different vcpu threads, so mutex should be used to protect it.
Both each vcpu thread and pci_root share mmio_bus and io_bus, so use Arc
for mmio_bus and io_bus. But pci_root is inserted into io_bus for pci cfg io,
in order to resolve reference loop and memory leak, weak is used for
pci_root.mmio_bus and pci_root.io_bus.
BUG=b:174705596
TEST=boot a vm and check its function
Change-Id: I7b3e63db76a90bc3873619b4d80a66db741ce78f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3184724
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Platform device is another type of device which might be assigned
directly to VM by using the same IOMMU DMA isolation technique.
In contrary to PCI, platform device has no config space which
describes device resources and makes it self-contained and
self-discoverable. Therefore, platform device resources are described in
FW and host is the one who enumerates/probes devices by parsing DT/ACPI.
We have ioctl i/f which allows to expose all that info to VMM.
Add platform bus specific calls to interact with host properly and
plug in to aarch64 bus creation code.
Note, for now all IRQs are abstracted to wired line (SPI in ARM GIC world)
which means guest wont see MSI-X for platform devices.
BUG=b:185504618
TEST=trogdor64-manatee SDHCI and GENIQUP device passthrough boots/works
Change-Id: Id0e9efde3586af77ed1d0b8bf79ca485906afb83
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961216
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Commit-Queue: Micah Morton <mortonm@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Before we call build_vm we are creating devices and there is no reason
to assume those have to be PCI only. In preparation for VFIO platform
device support, add super trait which allows to pass generic device
structure around and still be able get back to our original type.
BUG=b:185504618
TEST=manatee PCI device passthrough boots/works
Change-Id: I500f44af430f5f06299f20fc4ca17ca008a7e0c5
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961210
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
If we need descriptor for things that aren't file or other shared_memory objects, we can create a separate descriptor change, but it shouldn't be the default.
This reverts commit 533c5c8258.
Reason for revert: this causes conflicts with other platforms.
Original change's description:
> vm_memory: Add from_desciptor() in MemoryMappingBuilder
>
> MemoryMappingBuilder had `from_file()` and `from_shared_memory`, which
> are almost the same. So, this commit adds `from_descriptor()` to replace
> both of the two.
>
> BUG=b:194137301
> TEST=build
>
> Change-Id: Ia13f5e8e0f95a5c32e47dc9b3be13b7a7fa510bf
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3159881
> Tested-by: kokoro <noreply+kokoro@google.com>
> Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
> Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Bug: b:194137301
Change-Id: Ie203ee3eb3dcddd41c5e55b6980dc6292eb24f85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3183183
Auto-Submit: Udam Saini <udam@google.com>
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Commit-Queue: Udam Saini <udam@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
MemoryMappingBuilder had `from_file()` and `from_shared_memory`, which
are almost the same. So, this commit adds `from_descriptor()` to replace
both of the two.
BUG=b:194137301
TEST=build
Change-Id: Ia13f5e8e0f95a5c32e47dc9b3be13b7a7fa510bf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3159881
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Tree-wide cleanup of new clippy warning in Rust 1.54 that warns about
needless borrows:
error: this expression borrows a reference (`&...`) that is
immediately dereferenced by the compiler
https://rust-lang.github.io/rust-clippy/master/index.html#needless_borrow
BUG=b:197251702
TEST=bin/clippy # with rust-toolchain = 1.54.0
Change-Id: Ib702ec524d4623d264a00ec11dbc2150c411a67b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3108321
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Allen Webb <allenwebb@google.com>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Add necessary kernel cmdlines for aarch64.
Adjust PCI address to make room for ramoops on aarch64.
Move the code from x86_64 to common places.
BUG=b:153934386
TEST=vm_pstore_dump
Change-Id: I8f92a7fd04a49afd7e8be9e7cf1901ef70b88d65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3103131
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Kansho Nishida <kansho@chromium.org>
Commit-Queue: Ryo Hashimoto <hashimoto@chromium.org>
Device implement HotPlugBus trait could notify hotplug event into
guest, and such device should be added into RunnableLinuxVm, so it
could be used at device plug in and plug out.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: I9497f61312582483090ff708d0f37b97d7303811
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954673
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
When a vfio pci device is added through hotplug in, it should be configured
at runtime and added into pci_root->devices tree, so pci_root is added
into linux.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: Ibcb5f4a849134f64fbceeac645bebd80d6ca72d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954672
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Move the definitions of SerialHardware, SerialParameters and SerialType
to the devices crate so that they'll be available for code in the
devices crate as well.
BUG=b:195495971
TEST=cargo test
Change-Id: Ieb711bdb18a8afdb28cac262a3355739604d4607
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3096439
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Hotplugged device will be configured at runtime and configure_pci_device()
will allocate resource for added device and put this device into LinuxVm.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: I2c77f006d135c1b1487d4e89a50b1b186beeb48e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954671
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
BUG=b:191784608
TEST=Build and run atest in Android tree
Cq-Depend: chromium:3073700
Change-Id: I5fcfa166caf8c5a5f759a8f62ef78a293db95f1a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3071900
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Protected VMs require all virtio data to be bounced through a memory
window shared between the host and the guest. Although this can be
achieved by forcing the guest to use swiotlb bouncing for all DMA
transfers, the recent introduction of "Restricted DMA" in Linux allows
these buffers to be sized and allocated on a per-device basis.
Remove the 'swiotlb=force' option when '--protected-vm' is set in favour
of describing a reserved memory region to be used as the swiotlb buffer
for all virtio-pci devices, adjustable via the new '--swiotlb' option.
BUG=b:190593703
TEST=cargo test on x86 and arm64 machines
Cc: David Brazdil <dbrazdil@google.com>
Cc: Claire Chang <tientzu@chromium.org>
Cc: Quentin Perret <qperret@google.com>
Cc: Andrew Walbran <qwandor@google.com>
Cc: Marc Zyngier <mzyngier@google.com>
Change-Id: I2d48a7c77740e7f3ad996ad33592f0acd53b7144
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3064198
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Will Deacon <willdeacon@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This flag is intended to be used to delay making a VM's RT VCPUs
RT until "make_rt" is called, in order to avoid boot time
regressions with RT.
BUG=b:142777321
TEST="grep policy /proc/<pid of rt vcpu>/sched" to make sure RT vcpu
isn't RT until "make_rt".
Change-Id: I1b9132e11f0acc626434c60cecc2f4afe350961a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2703224
Auto-Submit: Suleiman Souhlal <suleiman@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Suleiman Souhlal <suleiman@chromium.org>
The devices to be notified on resume are unrelated to the functionality
of Bus, which is looking up devices in an address space. Additionally,
each Bus instance had its own list of devices to notify, although in
practice, only the one in the I/O bus was used.
Move the resume_notify_devices list into RunnableLinuxVm instead.
BUG=None
TEST=Boot Crostini on x86 and arm
Change-Id: I72c629c6d6589c4a9350831c8a076c5c0c9f9aeb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3043489
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
In VT-d, the IOMMU hardware can translate guest physical address that
is no more than MGAW (Maximum Guest Address Width) which is reported
from the VT-d Capability register.
We pass this information to the guest IOMMU front driver so that it
can allocate appropriate IOVA.
VT-d indicates that "implementations must support MGAW at least equal
to the physical addressability (host address width) of the platform".
Thus we take the Physical Address Bits that is reported by
CPUID.80000008H as the minimum MGAW.
BUG=b:181736020
TEST=--vfio=/sys/bus/pci/devices/0000:00:14.0,iommu=on
Change-Id: I26a421ea2e7dd893d413d63ab313721cfdf0b5c1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2757278
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Stevens <stevensd@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: David Stevens <stevensd@chromium.org>
Make sure that file descriptors associated with GuestMemory are
inherited by each child process. Not inheriting them means that
GuestMemory thinks it owns a bunch of fds when it actually doesn't and
closing them in the child process would either lead to EBADF errors or
closing some unrelated fd.
BUG=none
TEST=CQ
Change-Id: I5475f3f9cc24cc62522066b8535693f95327cd92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3023805
Auto-Submit: Chirantan Ekbote <chirantan@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
The flag sets a config option wayland_dmabuf which is
no longer used. Deprecating the flag first, then
a separate CL will remove it once callers no longer
set it.
BUG=b:192823933
TEST=cros_workon_make --board=nami crosvm --test
Change-Id: Iea0bc6d89ed8991351eecff357b43c8eb74c553b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3008479
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Nicholas Verne <nverne@chromium.org>
Reviewed-by: Fergus Dall <sidereal@google.com>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reusing struct minijail for multiple forked children isn't supported and
was only accidentally functional. The new minijail fixed that bug and
now the jails must be explicitly cloned to be reused.
BUG=b:187741537
TEST=CQ passes
Cq-Depend: chromium:2850757
Change-Id: I986223c7089ded4a9a55e666a13663a625d760b5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2889652
Reviewed-by: Allen Webb <allenwebb@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Allen Webb <allenwebb@google.com>
The --cpu-cluster option can be used to report a physical grouping of
CPUs in the device tree as a "cpu-map" node:
https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/topology.txt
Each instance of the --cpu-cluster option specifies a new group
consisting of a list of CPUs, and it may be repeated to add multiple
groups.
The --cpu-capacity option can be used to specify the relative
performance of CPUs so that the guest kernel's scheduler can make better
decisions on systems with heterogeneous cores (e.g. big.LITTLE).
--cpu-capacity units are left up to each architecture; for devicetree
systems, capacity is used to fill the cpu capacity-dmips-mhz (Dhrystone
benchmark MIPS per MHz) field in each cpu node:
https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/cpu-capacity.txt
For example, on a trogdor board, there are 6 little cores (0-5) with a
capacity of 452, and 2 big cores (6-7) with a capacity of 1024, which
results in a crosvm command line argument of:
--cpu-capacity 0-452,1=452,2=452,3=452,4=452,5=452,6=1024,7=1024
Currently, these options only have an effect on devicetree platforms and
are ignored elsewhere; they may be expanded in the future to fill in the
equivalent ACPI tables if systems with heterogeneous CPUs are used
there.
BUG=b:182198842
TEST=Start crosvm on kevin with --cpu-cluster options
TEST=crosvm run --cpu-cluster 0,1,2,3 --cpu-cluster 4,5
Change-Id: I59c466549ccd908f8eea1da0651d82716bc82972
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2762298
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
This will be used to dynamically add and remove bus ranges when the PCI
command register is updated to enable/disable memory and IO decode.
BUG=b:174705596
TEST=cargo test -p devices
Change-Id: I6bb175e0628bf598d049562700e2f55a2a62df59
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2689081
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
These parameters multiplied the number of type arguments to build_vm
unnecessarily and complicated the thread of execution in the programmers
head. Closures also complicate the borrow rules, making things much
harder to change.
This change uses the results of the closures (e.g. PCI devices, IRQ
chips) as parameters instead. The rest of this change follows naturally
from pulling on that thread until tests pass.
As a result of the removal of several type arguments, the code size was
reduced by ~100KiB on a 5MiB build.
BUG=b:185170486
TEST=./test_all
Change-Id: I6bcc5eb1b1f3031d4328bb4a81ddef618d04767b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2829136
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
hugepages (--hugepages) argument will be passed down to arch layer so that
it can configure GuestMemory to support Transparent Huge Pages.
BUG=b:174206107
TEST=arc.Boot.vm on hatch-arc-r
Signed-off-by: Sergey Senozhatsky <senozhatsky@chromium.org>
Change-Id: I1590238f7be3f12c9aa22b4c9061a56bfc381332
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2812544
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
This CL addresses some minor issues with the existing interface:
1. from_descriptor is too generic for some platforms that require
special handling for file/File backed mappings.
2. Nearly all call sites pass either File or SharedMemory. Now
we just have from_ methods for those types to preserve type
information.
3. Other platforms require additional fields in MemoryMapping, so a
tuple struct no longer makes sense.
4. The mmap syscall error message was misleading as we use it for more
than just the mmap syscall.
BUG=None
TEST=builds
Change-Id: I74c41bad52bb81880a11231cd18f47e233548a24
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2815614
Reviewed-by: Udam Saini <udam@google.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
This requires exporting the memory layout from the arch crates, but it
does simplify the bloated build_vm interface a bit. It also will allow
for more fine-grained control the backing memory of GuestMemory.
TEST=test_all
BUG=b:183988204
Change-Id: Ie76755198d2fdc2a41bd538650939d6550686b88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2809434
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Wrap the link to the FDT spec in <> so it becomes a clickable link in
the doc output.
Also fix a parenthesized abbreviation of Devicetree Blob to be DTB
rather than FDT.
BUG=None
TEST=cargo doc
Change-Id: Ie607acb6388820e7dfdb436bdad34ff077289666
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2763204
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This removes some unsafe code, improving the interface so that it cannot
be misused (e.g. previously, different Vec<u8> instances could be passed
to fdt functions that did not validate the contents).
The new implementation also adds some extra error checking to catch
invalid string values in all API entry points that accept strings, as
well as out-of-order node nesting that would result in DTB data that did
not conform to the spec.
BUG=b:175729255
TEST=cargo test -p arch
TEST=Boot Crostini on kevin (arm)
TEST=diff old and new dts from `dtc -I fs -O dts /proc/device-tree`
Change-Id: I567d562ed1b447aa0d282b68c71758edea13ffc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2713569
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
- Add an address space region for the protected KVM firmware.
- Query firmware size, mmap something that size and create a memslot.
BUG=b:163789172
TEST=cargo test
Change-Id: I054cf5d763c980d073c17bce70e85a781816b64d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2623942
Auto-Submit: Andrew Walbran <qwandor@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Use resources allocator to assign or reserve PCI device address.
For pass-through devices it will enable 1:1 mapping to the host BDF.
Transition to address_allocator for pci address and irq allocations.
BUG=None
TEST=build_test && tast run vm.*
Change-Id: I854da9645a305b7b24acb3dd6d851c3486ed23f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2210848
Tested-by: Tomasz Jeznach <tjeznach@chromium.org>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
When a FDT's property contains multiple values, the property must be a byte
array which uses the null character ('\0') as the delimiter, but we didn't
so.
This CL fixes the format so the guest kernel can parse PSCI versions
properly.
BUG=b:174224484
TEST=arc.Reboot.vm on kukui-arc-r
Change-Id: I61a983251cdbe8c021f5999cbf5efd026bbc0c27
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2567837
Tested-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Marc Zyngier <mzyngier@google.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
This CL wires up the powerd D-Bus PowerMonitor implementation to GoldfishBattery.
BUG=b:137890633
TEST=observe updated power data in ARCVM's /sys/class/power_supply after crrev.com/c/2550102
Change-Id: I38c613f13d3f7601435532213c7733558cb5f83f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2560276
Commit-Queue: Alex Lau <alexlau@chromium.org>
Tested-by: Alex Lau <alexlau@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
PowerMonitor trait objects can be used as a source of power supply data
and will be used by the goldfish battery. This CL includes a powerd backed
implementation of PowerMonitor available behind a feature flag which
receives updated data over D-Bus.
BUG=b:137890633
TEST=observe updated power data in ARCVM's /sys/class/power_supply at the end of this chain
Cq-Depend: chromium:2550102
Change-Id: Iacdc9bc7d11454d5b4f5d2639d19281174ad7e20
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2537349
Commit-Queue: Alex Lau <alexlau@chromium.org>
Tested-by: Alex Lau <alexlau@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Allow devices to be added to a Bus without a mutex. If a device
implements BusDeviceSync and is inserted into the Bus via the new
insert_sync function, the Bus will not lock the device before write and
read operations. This feature will allow IrqChip implementations to use
the mmio bus for APIC mmio, and allow each vcpu to write to their
respective APICs simultaneously.
This also changes the BusDevice trait so read and write functions take a
new BusAccessInfo struct. The BusAccessInfo conveys the full address of
the read/write operation, the offset of the address relative to the
device start address, and an id that in practice will hold the vcpu id
for the vcpu thread perforing the read/write.
As a result, inserts into the Bus are no longer distinguished between
full_addr and non full_addr inserts. Instead, each device's BusDevice
implementation must decide whether they use the absolute read/write
address or the relative read/write offset.
BUG=chromium:1077058
TEST=ran build_test
TEST=ran simple debian image
Change-Id: I9125aaa69869c1004b6c6a099b50f5c58038d4ab
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2514662
Reviewed-by: Zach Reizner <zachr@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>
This CL transitions most structs to RawDescriptor and the
associated traits if possible.
BUG=b:162363783
TEST=./build_test
Change-Id: Iabae6ac212787836d77de2b9ffb5d451421ab0dd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2530911
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Michael Hoyle <mikehoyle@google.com>
Commit-Queue: Michael Hoyle <mikehoyle@google.com>
Add a new command "battery" which is used to modify the virtual
battery/ac status.
When there is goldfish battery device model created, the command
is able to sent to the goldfish battery monitoring thread. If no,
the command won't be sent.
The supported commands are:
1. crosvm battery goldfish status <status string> crosvm.sock
2. crosvm battery goldfish health <health string> crosvm.sock
3. crosvm battery goldfish present <number> crosvm.sock
4. crosvm battery goldfish capacity <number> crosvm.sock
5. crosvm battery goldfish aconline <number> crosvm.sock
"goldfish" is the battery identifier to specify which virtual battery
is going to be modified by this command in case there are multiple
virtual batteries in the guest in future. Right now only one goldfish
battery is supported.
BUG=chromium:1050432
BUG=b:137890633
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
and boot linux guest with goldfish_battery driver enabled. From host
side, execute command "#crosvm battery goldfish status discharging
crosvm.sock" can make the guest receive an interrupt, and the status
sysfs is changed to "Discharging". Also tested the other commands
as well.
TEST=modified values are visible in ARCVM and interrupts are triggered
Change-Id: I82177811a6f2b1960f7895522760ff3b8143163f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2119574
Tested-by: Alex Lau <alexlau@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alex Lau <alexlau@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
By opening the directory containing a socket we can use
/proc/self/fd/%d/ to get a shorter path to that socket that can fit in
the 108 character limit when the original did not.
This allows us to increase the maximum size of VM names from 21 to 63
characters.
BUG=chromium:1144639
TEST=vmc start {61 character name} - rejected
TEST=vmc start {60 character name} - works
Cq-Depend: 2517276
Disallow-Recycled-Builds: test-failures
Change-Id: Id5aba6372e3ef7840406ddf6e7553a459824c9fc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2519335
Tested-by: Fergus Dall <sidereal@google.com>
Commit-Queue: Fergus Dall <sidereal@google.com>
Reviewed-by: Nicholas Verne <nverne@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
