Commit graph

211 commits

Author SHA1 Message Date
Keiichi Watanabe
621e719751 cargo: Deny compiler warnings
Fix exiting compiler warnings and enable "-Dwarnings" to reject code
emitting new warnings

BUG=b:181763000
TEST=CQ

Change-Id: I2ab69e861f0bf9dee8378ac1b33354c87a6a0c42
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/4011747
Auto-Submit: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
2022-11-08 16:53:48 +00:00
Daniel Verkamp
e8fe4b2400 aarch64: provide initial vcpu regs via vcpu_init
The code from configure_vcpu_early() is split into two parts:
1. vcpu_features() returns the `VcpuFeature`s required for vcpu.init()
2. vcpu_init() returns the general register state

This makes use of the new generic vcpu_init code path and moves the
general purpose register initialization into configure_vcpu() rather
than the ARM-specific confgiure_vcpu_early() to be consistent with other
architectures. Only the vcpu.init() call needs to happen before irqchip
is finalized on ARM, not other register setup.

BUG=b:237095693
TEST=tools/presubmit --all
TEST=Boot Crostini on trogdor

Change-Id: Ib3eab946ba9f1e407f339c2119d36d280655066f
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3786979
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-11-02 18:08:46 +00:00
Masami Hiramatsu
c80de3af0e aarch64: Fix Goldfish battery to send IRQ correctly
Since the virtio allocates all available IRQ lines for VGIC,
system_allocator::allocate_irq() returns 32 for Goldfish battery,
but that is not handled by the VGIC. In the result, the interrupts
from Goldfish Battery device are dropped in the host kernel. Thus
even if the crosvm detects the AC unplug, it is not notified to
the guest.

To fix this issue, assign a static IRQ number (#3) to Goldfish
battery device as same as other devices, so that it can deriver the
interrupts correctly to the guest side via VGIC.

BUG=b:252582345
TEST=Boot the ARCVM and run 'dumpsys battery' and unplug/re-plug
  AC connector several times, and confirm the AC status is updated.

Change-Id: Icdf3713cdf615d0039dd4e7719b80cad32333094
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3971137
Reviewed-by: Masami Hiramatsu <mhiramat@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Auto-Submit: Masami Hiramatsu <mhiramat@google.com>
2022-10-25 01:02:33 +00:00
Daniel Verkamp
474d2eea17 arch: split fdt code into its own crate
This will let the hypervisor crate use types and functions from the new
cros_fdt crate (it could not depend on arch, since that would cause a
circular dependency).

No functional change, just code movement.

BUG=b:253416076
TEST=cargo build
TEST=cargo build --target=aarch64-unknown-linux-gnu

Change-Id: I62d906941867c45f1b77ff1db6923d915ce2123e
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3965088
Reviewed-by: Steven Moreland <smoreland@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-10-19 17:43:19 +00:00
Pierre-Clément Tosi
b779c5cdef hypervisor: ProtectionType: Add helper methods
Introduce a set of helper methods that expose individual characteristics
that particular subsets of the ProtectionType variants share. These will
simplify various match statements into conditionals by encapsulating the
deduction of those characteristics, making the calling code more concise
and robust.

BUG=b:243646855
TEST=build

Change-Id: I65ff3e61c448d90704551b79c21c64d1b4c11dc4
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3944852
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
2022-10-14 14:12:46 +00:00
Andrew Walbran
13cbc69abc aarch64: Don't include pVM firmware region in memory size calculation.
The pVM firmware memory region is allocated before
AARCH64_PHYS_MEM_START, but several parts of the code were assuming that
all memory was contiguous and after that.

BUG=b:244553205
TEST=Patched into AOSP and ran some VMs.

Change-Id: I8caefc9cae79c98ea62ee02a506b1b485d3f09a6
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3921604
Reviewed-by: Pierre-Clément Tosi <ptosi@google.com>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Jiyong Park <jiyong@google.com>
2022-10-12 17:42:33 +00:00
Pierre-Clément Tosi
7245e26c57 aarch64: Add support for GDB SingleRegisterAccess
Add the infrastructre for GDB 'p'/'P' packets, used by the client to get
or set individual registers.

Implement a back-end using KVM_{G,S}ET_ONE_REG on AArch64, enabling the
client to access the architecture's numerous system registers.

Add stubs for x86 to please the compiler; leave them unimplemented as,
although the ioctl is available, the architecture doesn't seem to make
use of it.

BUG=b:222222882
BUG=b:240711627
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests

Change-Id: I01968275e88e9d0098de40b3f78e2cd3a61b75da
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3785468
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
2022-09-28 11:26:00 +00:00
Pierre-Clément Tosi
7737c533db gdb: Add basic support for AArch64
Enable the "gdb" feature on AArch64 (KVM) builds and add support for:

 - reading & writing guest memory (only guest IPAs, for now)
 - getting & setting core registers
 - getting & setting the few system registers from kvm_regs
 - setting hardware breakpoints (no software breakpoints, for now)
 - enabling single-step mode

BUG=b:222222882
BUG=b:240711627
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests

Change-Id: I0ae38c1065002d55a569b1575b1637110694e6db
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3785467
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Takaya Saeki <takayas@chromium.org>
2022-09-28 11:25:50 +00:00
Dennis Kempin
1dab58a2cf Update all copyright headers to match new style
This search/replace updates all copyright notices to drop the
"All rights reserved", Use "ChromiumOS" instead of "Chromium OS"
and drops the trailing dots.

This fulfills the request from legal and unifies our notices.

./tools/health-check has been updated to only accept this style.

BUG=b:246579983
TEST=./tools/health-check

Change-Id: I87a80701dc651f1baf4820e5cc42469d7c5f5bf7
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3894243
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
2022-09-13 18:41:29 +00:00
Peter Collingbourne
87ddd08405 hypervisor: change the last KvmVm::new argument to a struct
We are going to need to start passing a new arch-dependent configuration
parameter to KvmVm::new in addition to protection_type. Since we can't
[cfg] a function argument, and to avoid churning the tests the next time
we need another argument, let's create a hypervisor::Config struct and
start passing protection_type that way.

Bug: b:234779841
Change-Id: I42ce9438b064658ebb9732e78ee5c82dac2636b6
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3892140
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Peter Collingbourne <pcc@chromium.org>
2022-09-13 17:14:44 +00:00
Xiong Zhang
6a3fa62327 pci: Add a function to construct ssdt method for vfio-pci
For vfio-pci device, guest couldn't call this device's acpi method like
_DSM/_DSD/_PS0..., in order to let guest run it, crosvm will provide
virtual method to guest, this virtual method pass guest method call into
host and pass host return value into guest.

This commit adds a function into pci device trait, which returns the
aml code to construct virtual acpi method. Two pages mmio are used to
pass acpi parameters and return value, when guest access the first page,
vm exit happens and it is trapped into crosvm, when guest access the
second page, no vm exit happens.

Co-authored-by: Victor Ding <victording@google.com>

BUG=b:194390621
TEST=tools/presubmit

Change-Id: I71797394de61437d4d105e65488d36511c71cbd7
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3813137
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Victor Ding <victording@chromium.org>
Commit-Queue: Victor Ding <victording@chromium.org>
2022-09-07 04:42:44 +00:00
Pierre-Clément Tosi
3174c86a36 tree-wide: Rename protected_vm as protection_type
Rename all local variables across the codebase to be consistent with the
recently renamed cfg.protection_type (from cfg.protected_vm). This
commit is intended to make the renaming less cumbersome to review.

Note: no functional change intended.

BUG=b:243646855
TEST=build

Change-Id: I495b0854ce60cb1dc041ef43480fe11b379883c2
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3867616
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
2022-09-01 22:20:40 +00:00
Pierre-Clément Tosi
436d19645c config: Rename cfg.protected_vm as protection_type
Improve clarity and consistency between the variable and its type, given
that it represents the protected/unprotected state AND whether some
firmware needs to be used. In particular, it isn't the protected VM
itself.

Similarly, rename components.protected_vm for the same reason.

OTOH, keep cmd.protected_vm for --protected-vm as it is dedicated to
making the VM protected and follows the name of the CLI flag.

Note: no functional change intended.

BUG=b:243646855
TEST=build

Change-Id: Id91d1c83e9efa79562022dacf37f4c89e451f2b5
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3867615
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
2022-09-01 22:20:40 +00:00
Pierre-Clément Tosi
a673d2e639 aarch64: configure_vcpu_early: Refactor ABI setup
Flatten the logic for initializing the PC and group the pvmfw ABI code.

Note: no functional change intended

BUG=b:243646855
TEST=build

Change-Id: I973dfb324d9facdc3f79cbdb41b69b8a7fd1444e
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3867614
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
2022-09-01 22:20:40 +00:00
Dmytro Maluka
d98e20b908 crosvm: Preserve platform devices in RunnableLinuxVm
If a vfio-platform device has no mmio regions, it is unexpectedly
destroyed at startup (in particular, its vfio device fd is unexpectedly
closed, so its interrupt forwarding stops working, etc) since in
generate_platform_bus() arced_dev is not added to mmio_bus so there are
no more references to the device. To fix this issue, preserve references
to platform devices also in platform_devices field of RunnableLinuxVm.

BUG=b:197169350
TEST=Use vfio-platform for passthrough of a device with interrupts but
without mmio regions, e.g. touchpad on Brya, and check if it works in
the VM (i.e. its interrupts are successfully delivered).

Change-Id: I4042c5508ef6b69649c7d20962edf61b735abc03
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3820043
Commit-Queue: Dmytro Maluka <dmaluka@google.com>
Tested-by: Dmytro Maluka <dmy@semihalf.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-08-26 08:41:37 +00:00
Pierre-Clément Tosi
669af0d4d7 VcpuRegAArch64: Parametrize X0-X30 as X(u8)
Use a single variant to represent a core GPR instead of having one
variant per register. This simplifies manipulating VcpuRegAArch64 at the
expense of needing the instantiating code to ensure that the <u8> is
properly set (i.e. is < 31). This is currently not an issue as the
variant is only instantiated with constant values.

BUG=b:222222882
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests

Change-Id: I0043c101e88794a1661fadbc22b79fc68356270d
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3822688
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Auto-Submit: Pierre-Clément Tosi <ptosi@google.com>
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
2022-08-18 12:57:45 +00:00
Andrew Walbran
379dd2dfec Allocate pVM firmware memory consistently.
Allocate the same way as the rest of RAM, whether in
unprotected-with-firmware mode or actually protected mode.

TEST=tools/dev_container tools/run_tests --target=vm:aarch64

Change-Id: Ic0ebc0d90e91bd450af55f3252039ddab8d26443
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3827215
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-08-17 10:08:53 +00:00
Andrew Walbran
3fcf6e68eb Allocate more RAM for pVM firmware.
We would like 2 MiB for runtime data as well as the 2 MiB image.

TEST=tools/dev_container tools/run_tests --target=vm:aarch64

Change-Id: I0c0cba35bfc6cf6d8c54afd7df8bd929726e2053
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3827214
Commit-Queue: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Andrew Walbran <qwandor@google.com>
2022-08-17 09:54:33 +00:00
Pierre-Clément Tosi
7b5f6b198f VcpuRegAArch64: Follow AArch64 for variant names
Rename the confusing GPR variants from the Wn naming convention (defined
by the architecture as the lower 32 bits of the 64-bit register) to Xn,
which the enum variants actually represent.

Note: no functional change intended.

BUG=b:222222882
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests

Change-Id: I510b93f8aea901dc3707016368c9871392701f51
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3780660
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Auto-Submit: Pierre-Clément Tosi <ptosi@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
2022-08-16 18:51:13 +00:00
Tinghao Zhang
e3401082c9 devices: support hotplug for pcie switch
This patch adds support for hotplug pcie switch. The user send
HotplugCommand of the new added device with the same order they
appear in device tree, and in handle_hotplug_command we add device
accordingly. During hotplug out, firstly vfio endpoint device will
send hot unplug command, we remove these endpoint device immediate-
ly, and then remove any bridge that is hotplugged into the system
but with zero child device connected to it. When all child bridges
got cleared up and pcie root port have no child devices, we send
plug out interrupt to guest kernel and probe hotplug out handling
in guest.

BUG=b:199986018
TEST=hotplug in and out pcie switch repeatedly

Change-Id: Ic3ab86d14efba4d05e204936e08bc6a582723484
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3769817
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-08-10 18:50:26 +00:00
Daniel Verkamp
cd251b3067 Reformat imports with tools/fmt --nightly
A few new grouped imports have made it in since the tree-wide
reformatting.

BUG=None
TEST=tools/presubmit

Change-Id: I93af3c741f57c1da73d4c9e8a28be424c1ea45fe
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3818244
Auto-Submit: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
2022-08-08 20:29:50 +00:00
Tinghao Zhang
e931dee2a6 devices: pci: impl pci root worker
Hotplug command is facing dead lock issue when it tries to acquire
the lock for pci root in the vm control thread. Dead lock could
happen when the vm control thread(Thread A namely) is handling the
hotplug command and it tries to get the lock for pci root. However,
the lock is already hold by another device in thread B, which is
actively sending an vm control to be handled by thread A and
waiting for response. However, thread A is blocked on acquiring the
lock, so dead lock happens. In order to resolve this issue, we add
a new pci root worker thread and push all work that locks pci root
to this thread.

BUG=b:199986018
TEST=tools/presubmit

Change-Id: I11552a1c9c626035d0ca01ce2835fd8b6c067a67
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3765366
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
2022-08-08 18:22:50 +00:00
Zide Chen
69775f0346 x86_64: add new option enable-hwp to expose HWP feature to guests
Expose HWP (HW P-State) feature to the guest if enable-hwp is present
and implement these dependencies:

- enable-hwp depends on host-cpu-topology option
- itmt depends on enable-hwp option

Group the CPU configuration entries to a new struct CpuConfigArch,
to simplify APIs in the vCPU configuration path.

BUG=b:199380745
TEST=boot Redrix manatee and verified that intel_pstate driver works

Change-Id: Icdd19190f6a7518492ff5fc54708af40288a1422
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3771065
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
2022-08-05 20:33:12 +00:00
Alexandre Courbot
4c4ee4543c main: convert battery options to use serde_keyvalue
This requires the introduction of a BatteryConfig structure to parse,
which is probably a good idea anyway as it reserves some space to add
more battery-related options.

BUG=b:218223240
TEST=cargo test parse_battery

Change-Id: I82db7fe7ce2daeca004e734aaafa542583998561
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3784661
Tested-by: Alexandre Courbot <acourbot@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
2022-08-02 07:06:10 +00:00
Sebastian Ene
46be6c3b59 vmwdt: Update the fdt node
Update the compatible name of the device to qemu,vcpu-stall-detector
and fix the clock-frequency property name to reflect the one defined in
LK upstream:

https://lore.kernel.org/all/20220711081720.2870509-2-sebastianene@google.com/

BUG: b:240271204
Change-Id: Ib0c6442343d95261f36f485f31426feec0f7dde3
Signed-off-by: Sebastian Ene <sebastianene@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3785482
Reviewed-by: Will Deacon <willdeacon@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-07-28 08:59:30 +00:00
Dennis Kempin
4fea399df9 Reformat imports
crosvm is switching the import style to use one import per line.
While more verbose, this will greatly reduce the occurence of merge
conflicts going forward.

Note: This is using a nightly feature of rustfmt. So it's a one-off
re-format only. We are considering adding a nightly toolchain to
enable the feature permanently.

BUG=b:239937122
TEST=CQ

Change-Id: Id2dd4dbdc0adfc4f8f3dd1d09da1daafa2a39992
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3784345
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
2022-07-28 00:15:50 +00:00
Frederick Mayle
92e4fc9e75 aarch64: Don't add goldfish battery to fdt when not present
TEST=tools/presubmit
BUG=b:239577091,b:240298654

Change-Id: Idb171a4e326fcb2fba5ce788c40b97dcea3058f6
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3787271
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Frederick Mayle <fmayle@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-07-26 21:30:27 +00:00
Steven Richman
e3259f6319 kernel_loader: load elf32 images
Loading 32-bit images is needed for kvm-unit-tests.

BUG=b:233317135
TEST=boots, new unit tests

Change-Id: I6ba63255e0e2993f3735ef81489f64dbd0bb6374
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3764465
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Auto-Submit: Steven Richman <srichman@google.com>
Tested-by: Steven Richman <srichman@google.com>
Commit-Queue: Steven Richman <srichman@google.com>
2022-07-26 16:10:07 +00:00
Sebastian Ene
acb1f6683c vmwdt: Add memory mapped watchdog backend driver
This adds a new dt node identified by "qemu,vm-watchdog". The watchdog
is instantiated per-cpu and each instance has the following layout
described in this document:
https://docs.google.com/document/d/1DYmk2roxlwHZsOfcJi8xDMdWOHAmomvs2SDh7KPud3Y/edit?resourcekey=0-oSNabc-t040a1q0K4cyI8Q#heading=h.4hbqud2zl941

The watchdog uses an internal clock which is driven by the
timerfd at regular intervals. When the internal clock expires, a counter
value is decremented. When the counter register reaches value "0",
the watchdog expires. To prevent 'watchdog expiration', regular pet
events should be sent from the guest kernel driver.

BUG=b:213422094
Signed-off-by: Sebastian Ene <sebastianene@google.com>
Change-Id: Ic8c0488ffdfed1a43b6deb34b72d37f46e5e18a2
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3768290
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-07-21 14:07:11 +00:00
Noah Gold
637b1ee1d1 arch: split platform lib code into sys mod.
Highlights:
* goldfish battery never worked on Windows, but it sort of compiled
  anyways downstream. This CL makes it unix only because it never worked
  on Windows as a device anyway.

BUG=b:237597358
TEST=builds

Change-Id: Ia5fc3b5e5fcd243d8454646b00a6857085d018ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3741432
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
2022-07-14 00:08:33 +00:00
Daniel Verkamp
1b7d5b8fba arch: provide one vcpu_init per vcpu
Rather than having a single vcpu_init instance that is used for all
VCPUs, make vcpu_init into a Vec so it can store different initial state
for each VCPU. This allows us to set up e.g. bootstrap processor state
differently than other processors, and it also means that the VcpuInit
struct doesn't need to be Copy.

BUG=b:237095693
TEST=Boot Linux with >1 CPU

Change-Id: I0ebfdc2dbd84d0817e3f75c2c852e4320b9e77c5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723798
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-06-29 18:14:49 +00:00
Noah Gold
4ea25d1e33 x86_64: add TSC leaf synthesis.
There have been two evolutions of providing the TSC cpuid leaf
(aka 0x15) to the guest.

a) For CrosVM on Windows, we have been providing the leaf
   unconditionally.  Furthermore, we've not been using the
   exact host leaf; instead, we calibrate the TSC frequency
   and provide that value in the leaf. This was done because
   the actual cpuid leaf values are not as accurate as
   we needed them to be to drive a guest clocksource.

b) In CrosVM mainline, 4080aaf9b3
   introduced the flag enable_pnp / enable_pnp_data, and
   provides the exact host 0x15 leaf to the guest if the
   flag is enabled.

This CL adds a new hypervisor capability (CalibratedTscLeafRequired) to control
whether or not the calibrated TSC leaf should be used, in addition to a new CLI
option to force it on hypervisors where it isn't enabled by default. The new
option is `--force_calibrated_tsc_leaf`.

BUG=b:213152505
TEST=builds upstream, battletested downstream on WHPX.

Change-Id: I611422808a9e10578c0ddcbd211ae902f937685f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3698993
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-06-28 02:23:55 +00:00
Daniel Verkamp
b4244d3952 kernel_loader: load ELF kernels at the right paddr
Previously, we were loading ELF kernels at the provided kernel_start
address plus the p_paddr (physical address) field of each program
header. This resulted in the kernel being loaded after a big gap of
zero bytes, which accidentally worked on x86_64 because 0x00 0x00
encodes a valid instruction, and the entry point was at the beginning of
the first section, so execution would effectively "nop slide" its way
from the supposed entry point all the way to the actual beginning of the
correct code. In addition, the Linux kernel entry point is compiled as
position-independent code, so the mismatched address did not matter.

Fix this by loading ELF kernels at whatever physical address they
specify, without adding any extra offset. The load_kernel() function
still accepts a start address, but this is now used simply to verify
that the ELF file does not try to load any sections outside of the
desired kernel region.

As a demonstration, we can look at the instructions at the kernel's
declared entry point (0x1000000 for a normal x86-64 Linux kernel in ELF
format) by attaching to the gdb stub and running:

   (gdb) disas 0x1000000,+8

With the old behavior, we get purely 0x00 0x00 opcodes, decoding as:
   0x0000000001000000:  add    BYTE PTR [rax],al
   0x0000000001000002:  add    BYTE PTR [rax],al
   0x0000000001000004:  add    BYTE PTR [rax],al
   0x0000000001000006:  add    BYTE PTR [rax],al

With the new behavior, we get the correct entry point instructions:
   0x0000000001000000:  lea    rsp,[rip+0x1203f51]        # 0x2203f58
   0x0000000001000007:  lea    rdi,[rip+0xfffffffffffffff2] # 0x1000000

BUG=b:234155022
TEST=cargo test -p kernel_loader
TEST=Boot x86-64 ELF vmlinux kernel

Change-Id: Iae4c8db022674e6311e54dffe479a1ed430a1ef4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673612
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anton Romanov <romanton@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
2022-06-23 22:30:37 +00:00
Daniel Verkamp
8cac16bf75 kernel_loader: return a struct for better naming
The new LoadedKernel structure also splits out the size and end address,
which are both used in different places (x86_64 wants end, aarch64 wants
both).

BUG=b:234155022
TEST=tools/presubmit
TEST=cargo test -p kernel_loader

Change-Id: I86a7e412c983f29a2c614cc9e6896aa11db6ba94
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673611
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
2022-06-21 19:39:40 +00:00
Daniel Verkamp
77abcb0d0a arch: add VcpuInit data to provide initial values
This will be used to pass the initial register values for each vcpu.
Each architecture can define its own variant of the initial vcpu state.

BUG=b:234155022
TEST=tools/presubmit --all

Change-Id: I696a5ecda202c1ff0681f0b89b89b9eec11e27e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673615
Reviewed-by: Anton Romanov <romanton@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-17 20:50:51 +00:00
Vaibhav Nagarnaik
b8bfdb496f irqchip: Add IrqEventSource for each event
This allows irq processing thread to log statistics and metrics and
track them using the source of the device. To be upstreamed later.

Introduce `PCI_VENDOR_ID_CROSVM` which identifies devices created by
crosvm. And introduce `CrosvmDeviceId` which adds a unique device ID for
each type of crosvm device.

BUG=b:213149158
BUG=b:213152505
TEST=Compiled.

Change-Id: Ica1374d8a2d8fd627c9397553bb7fb62baeaff7d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3687418
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vaibhav Nagarnaik <vnagarnaik@google.com>
2022-06-17 18:44:20 +00:00
Daniel Verkamp
fb641f67e4 resources: introduce AddressRange type
The AddressRange type is used for representing contiguous memory or I/O
address ranges, mostly equivalent to RangeInclusive<u64> but with the
added benefit of implementing Copy and not carrying an extra field used
only for iteration, which we don't need.

Using an inclusive range means we can represent the full address space
with no weird corner cases around the upper limit of the range (for
example, an AddressRange covering the full 64-bit space can be
represented as start: 0, end: u64::MAX).

AddressRange also replaces the previous MemRegion type, which was a
start/size pair.

This normalizes the interface of the resources crates to use
AddressRange rather than a start/size pair; more cleanups throughout the
tree may be possible, but this commit attempts to be somewhat smaller to
have a hope of being reviewable.

BUG=b:222769529
TEST=tools/presubmit --all
TEST=cargo test -p resources

Change-Id: I8c90bdc28456221b5107ef7e589233315ea739c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3696671
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-16 20:29:26 +00:00
Masami Hiramatsu
eb83ee79b6 aarch64: Add Goldfish battery to aarch64 crosvm
Add Goldfish battery to aarch64 crosvm. The guest kernel will
see the goldfish battery node on the FDT.
This copies the seccomp policy for the battery from x86-64.

BUG=b:214124318
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
TEST=android-sh -c 'dumpsys battery'
TEST=tast run ${DUT} arc.PerfBoot.vm

Change-Id: I8212e760db5ffbc5d01442cfa7930baa5962ef6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3686713
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Masami Hiramatsu <mhiramat@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Masami Hiramatsu <mhiramat@google.com>
2022-06-15 02:46:45 +00:00
Peter Collingbourne
4f7d84e5b9 Fix some clippy warnings on aarch64.
Change-Id: Iac9a9540c585a08374c966a1014c6746fbba0554
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3687061
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Auto-Submit: Peter Collingbourne <pcc@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-06 16:58:32 +00:00
Dapeng Mi
4080aaf9b3 crosvm: expose cpu frequency and temperature CPUID bits to guest
Turbostat detects if CPU frequency and temperature features are
supported by reading several CPUID entries bits. Expose these
CPUID bits to guest when enable-pnp-data option is enabled.

Several MSR registers which turbostat depends on have been already
passed through when ITMT is enabled. Adding code to detect this and
avoid to doubly pass through.

BUG=b:229770963
TEST=Run "turbostat" in Chrome OS guest and show correct value.

Change-Id: Ieebaf616d544cb187a80ec6f3313a246ebf54bb2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3641466
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-31 02:03:38 +00:00
Mike Gerow
539ba3dcc9 Reland "devices: debugcon: add bochs-style debugcon device"
This is a reland of commit 129840471d

Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>

Bug: b:233610263
Change-Id: I2f2125da95e8907f4f0c16930952e9b765d33e6c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671087
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-05-26 19:25:02 +00:00
Mike Gerow
d46572f47e Revert "devices: debugcon: add bochs-style debugcon device"
This reverts commit 129840471d.

Reason for revert: This conflicts with https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3600167 breaking the build

Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>

Bug: b:233610263
Change-Id: Ia70540c3041611f59968cb7929b238eecfe2530d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671082
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
2022-05-26 18:23:30 +00:00
Mike Gerow
129840471d devices: debugcon: add bochs-style debugcon device
This allows for creating a simple write-only debug connection that uses
a single IO port. This method is supported by both bochs and qemu[1].

The main motivation here is to help in improving crosvm's ability to
boot OVMF, which makes use of this simple debug device on port 0x402.
For that one would use `--serial
type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.

Note that serde_keyvalue doesn't support parsing hex values, hence the
need to use `1026`, but I intend to address that as well to allow the
more natural `debugcon_port=0x402` phrasing.

[1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c

BUG=b:233610263

Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Mike Gerow <gerow@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-26 17:13:59 +00:00
Vineeth Pillai
81b5e616d6 crosvm: vm_events: consolidate vm events into one framework.
crosvm waits on events like exit, reset, crash, guest panic etc and
uses eventfd to wait on these events. As of now, we have 4 eventfds
and may increase.

This is an attempt to consolidate all Vm events into one framework.
Use Tube instead of Event to get consistent behavior between OSes.
Implement a wrapper over Tube to have a consistent API for events.

BUG=None.
TEST=Built crosvm. Ran a minimal vm to panic and verified that crosvm
received the panic event. cargo test on devices.

Change-Id: I313d428de5e3ce3b879982f913918ec0a4a72c35
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3480577
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vineeth Pillai <vineethrp@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
2022-05-20 18:04:21 +00:00
Sahitya Tummala
a6945f4a49 aarch64: Add support for loading kernel image formatted as ELF
This is done similar to x86 platform to check if a kernel image have
ELF signature first and if it doesn't, then it is passed to the Image
loader as a fallback.

BUG=b:232360323

Change-Id: I27b362952bd7f2678d1c7646b1b1c052c3518fca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3646449
Commit-Queue: Steven Moreland <smoreland@google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-13 18:48:12 +00:00
Junichi Uekawa
78a12954cf crosvm: Keep one MsrFileType per vcpu.
Each vcpu has a vcpu->MsrDev file mapping. Instead of trying to create
an instance at first use, just keep an empty map in the beginning.

BUG=b:215297064
TEST=boot volteer-manatee

Change-Id: Ic5a63b0427a6441f190da3917b5f272bbb8ec778
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3611369
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-09 08:11:40 +00:00
Daniel Verkamp
45b0920767 doc: add a top-level comment to all crates
This provides at least a minimal one-line description to show what each
crate is about.

BUG=None
TEST=tools/cargo-doc

Change-Id: I26732e8c29062e622d5be09bdc120a49d564b9fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3630422
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-06 20:46:57 +00:00
Andrew Walbran
0465b61b1e Move PVTIME down below MMIO_BASE.
This leaves the region between 0x4000_0000 and the start of RAM free of
MMIO, which simplifies the stage 1 page table mappings needed by the
guest, and makes room for the pVM firmware allocation to be expanded.

TEST=tools/dev_container tools/run_tests --target=vm:aarch64

Change-Id: Ibae73a946cadd16e6f03559d23cc256f4b9d3f3d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3627454
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-05-06 13:01:31 +00:00
Shikha Panwar
dac771b644 Add --unprotected-vm-with-firmware flag to simulate protected mode.
This runs an unprotected VM but uses the same memory layout as for a
protected VM, loads pVM firmware, disables the same devices as for
protected mode. This is useful for debugging pVM firmware and other
protected VM issues.

TEST=crosvm --extended-status run --disable-sandbox --serial=stdout,hardware=serial,num=1 --unprotected-vm-with-firmware=pvmfw --bios=test_bootloader
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
BUG=b:230475926

Change-Id: I9a8077d76874f10221071ea312291659d81da3d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3623760
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-04 09:36:08 +00:00
ZhaoLiu
0c2ce08ca1 x86_64: Preparation for ITMT scheduling in Guest
With Intel Turbo Boost Max Technology 3.0, (ITMT),  the maximum turbo
frequencies of some cores in a CPU package may be higher than for the
other cores in the same package. In that case, make the scheduler prefer
to run tasks on the CPUs with higher max turbo frequencies, to achieve
better performance.

When vCPUs 1:1 map to pCPUs, ITMT scheduling feature can benefit
performance of Guest. So when user sets `--itmt`, crosvm will check if
`--host-cpu-topology` is set or if `--cpu-affinity` is set for 1:1
mapping.

In kernel, ITMT scheduling feature depends on intel_pstate driver and
ACPI CPPC support.

To setup intel_pstate driver and pass CPPC capability check, we need
emulate related MSRs in userspace:

- MSR_HWP_CAPABILITIES and MSR_TURBO_RATIO_LIMIT: intel_pstate driver
  only needs to read. So we passthrough them to Guest. But please note,
  to be compatible with the configuration in initramfs, use `FromCPU0`
  Temporarily.

- MSR_PM_ENABLE and MSR_HWP_REQUEST: they are MSRs to control HWP.
  When intel_pstate driver is initializing, the driver will close/open
  HWP by writing into MSR_PM_ENABLE, and the driver also needs to set
  performance policy by writing some hints into MSR_HWP_REQUEST.
  Note that we don't want Guest's behavior to affect the performance
  control of the host, so use 'emulate' handler for them.

- MSR_PLATFORM_INFO: this MSR is emulated in kernel with a fault value
  by default. intel_pstate doesn't want this fault value, so we ask
  this MSR to exit to userspace and give it a real value.

- MSR_IA32_PERF_CTL: intel_pstate driver use this MSR to set the min
  pstate in the initialization. So use 'emulate' handler for this MSR.

Since of `FromCPU0` setting of MSR_HWP_CAPABILITIES, ITMT scheduling
will set the same priority for each core so optimization will not work.

BUG=b:225375705
TEST=Set `--itmt` and check /proc/sys/kernel/sched_itmt_enabled

Change-Id: Icfa85ffa15c3b977c3b62a1f8a379c4c2f5fc49d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3575511
Commit-Queue: Zhao Liu <zhao1.liu@intel.corp-partner.google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-04-25 08:21:16 +00:00