The current vhost-net msix irq injection flow is from vhost-kernel
to crosvm vhost-net, then to the KVM for irq injection. It still need
crosvm vhost-net to trigger irq, which is because the set_vring_call
is not directly using the msix irq fd.
To optimize this flow to be from vhost-kernel to KVM directly, need:
1. if the msix is enabled and unmasked, use the misx irq fd for the
vring_call directly so that all the misx injection can directly to
KVM from vhost-kernel.
2. if the msix is disabled or masked, use the indirect vhost_interrupt
fd to let the crosvm to control the irq injection.
BUG=None
TEST=cargo test -p devices
TEST=start crosvm with vhost-net, and run the iperf3 on the network
without any issue
Change-Id: Idb3427f69f23b728305ed63d88973156a03e7c6b
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2046452
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
1. Replace --cras-audio, --cras-capture, null-audio options by --ac97
option to create audio devices.
2. "--ac97 backend=BACKEND\
[capture=true,capture_effect=EFFECT]" is comma
separated key=value pairs for setting up Ac97 devices.
It can be given more than once to create multiple devices. Possible
key values are:
backend=(null, cras) - Where to route the audio device.
`null` for /dev/null, and cras for CRAS server.
capture=true - Enable audio capture.
capture_effects - | separated effects to be enabled
for recording. The only supported effect value now is EchoCancellation
or aec.
BUG=b:140866281
TEST=1.crosvm run -r ./vm_rootfs.img -c 4 -m 1024 -s /run --cid 5 --host_ip\
100.115.92.25 --netmask 255.255.255.252 --ac97\
backend=cras,capture=true,capture_effect=aec\
--mac d2:47:f7:c5:9e:53 ./vm_kernel
2. Record with the vm by:
arecord -D hw:0,0 -d5 -fS16_LE -c2 -r48000 /tmp/test.mp3
3. Verify that AEC is enabled within the recording stream by
cras_test_cleint.
Cq-Depend: chromium:2053654
Cq-Depend: chromium:2095644
Cq-Depend: chromium:2038221
Change-Id: Ia9e0e7cda1671a4842ec77a354efaa4a2dc745eb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2038413
Tested-by: Judy Hsiao <judyhsiao@chromium.org>
Commit-Queue: Judy Hsiao <judyhsiao@chromium.org>
Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org>
Auto-Submit: Judy Hsiao <judyhsiao@chromium.org>
The MsixConfig struct is responsible for all the operations of MSI-X
Capability Structure and MSI-X Table.
A msix_config object is created for each virtio device.
BUG=chromium:854765
TEST=cargo test -p devices
Change-Id: Ide7c34d335d49a201f20b0a4307bcda97d1d61b7
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
Signed-off-by: Zide Chen <zide.chen@intel.corp-partner.google.com>
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1828337
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Stephen Barber <smbarber@chromium.org>
The MSI-X feature is ported from Cloud-hypervisor commit 69e27288a2e.
(https://github.com/intel/cloud-hypervisor.git)
In this commit:
- add a new "msix" module to the pci crate.
- implement the MSI-X Capability Structure.
- implement per virtio device msix_vectors() function which represents the
supported MSI-X vector for this device.
BUG=chromium:854765
TEST=launch Crosvm on eve and Linux
TEST=cargo test -p devices
TEST=./bin/clippy
TEST=./build_test.py --x86_64-sysroot /build/eve
Change-Id: I5498b15a3bf115e34764e6610407b3ba204dae7f
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.corp-partner.google.com>
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1873356
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Stephen Barber <smbarber@chromium.org>
According to kernel Documents/vfio.txt and
Documents/vfio-mediated-device.txt,user pass host assigned
device or mdev to crosvm through --vfio parameter, vfio module
open this device and get this device's information.
Implement PciDevice trait on this device, then vfio_pci
module could trap guest pci cfg r/w and mmio r/w,
and transfer this operation into kernel vfio.
Currently the relationship of vfio container:group:device are
1:1:1, in the future it could extend to 1Ⓜ️n.
BUG=chromium:992270
TEST=none
Change-Id: I8006ef65022d56197eaeb464811a59db2ce54b9a
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1580458
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
We want to support 64-bit BARs and some additional functionality
is required.
BUG=chromium:924405
TEST=compile
Change-Id: I06aba41b6dfb9649437a417a32cb450d19d0d937
Reviewed-on: https://chromium-review.googlesource.com/1480740
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
The Ac97 device provides the guest with an audio playback device. All
input devices are stubbed out. Only playback at 48kHz is supported.
The device is emulated by `Ac97Dev` which interfaces with the PCI bus.
`Ac97Dev` uses `Ac97` to drive audio functions and emulate the device
registers. Physical Ac97 devices consist of two parts, the bus master
and a mixer. These two sets of registers are emulated by the
`Ac97BusMaster` and `Ac97Mixer` structures.
`Ac97BusMaster` handles audio samples and uses `Ac97Mixer` to determine
the configuration of the audio backend.
BUG=chromium:781398
TEST=crosvm run --disable-sandbox --null-audio --rwdisk gentoo.ext4 -c2
-m2048 -p 'root=/dev/vda snd_intel8x0.inside_vm=1
snd_intel8x0.ac97_clock=48000' vmlinux.bin
and play audio with aplay -d2 -Dhw:0,0 -f dat /dev/urandom
CQ-DEPEND=CL:1402264
CQ-DEPEND=CL:1421588
CQ-DEPEND=CL:1433794
CQ-DEPEND=CL:1432835
Change-Id: I9985ffad753bccc1bf468ebbdacec0876560a5e0
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1366544
Commit-Ready: Chih-Yang Hsia <paulhsia@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Chih-Yang Hsia <paulhsia@chromium.org>
Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org>
Now that cargo fmt has landed, run it over everything at once to bring
rust source to the standard formatting.
TEST=cargo test
BUG=None
Change-Id: Ic95a48725e5a40dcbd33ba6d5aef2bd01e91865b
Reviewed-on: https://chromium-review.googlesource.com/1259287
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
This will be used on ARM.
Change-Id: I61206b761f49f963f0cce706268379ceae1a0239
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1241540
Reviewed-by: Dylan Reid <dgreid@chromium.org>
The current PciRoot is only workable for the legacy I/O port 0xCF8
access mechanism; factor out the config access mechanism part of PciRoot
into PciConfigIo so that we can add a MMIO-based access mechanism for
ARM.
Change-Id: I87756b0ab31070d8717c76d419957bf5ea5d75ad
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1241539
Reviewed-by: Dylan Reid <dgreid@chromium.org>
PCI class codes are made up of three fields: class, subclass, and
programming interface. Some class/subclass combinations do not define
any programming interfaces, so add an optional parameter to specify the
value and use 0 if it is not provided.
Change-Id: Ib4000eafe2d7d003ed5753d7b0ea05e16fd06130
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1237358
Reviewed-by: Dylan Reid <dgreid@chromium.org>
passing everything in to the pci code is getting annoying. Instead build
it up in arch which already has access to all the needed resources.
Change-Id: If42f994443c4f11152fca8da16f27fa4cd80580d
Reviewed-on: https://chromium-review.googlesource.com/1237357
Commit-Ready: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
`PciRoot` represents the root PCI bridge for the system and manages PCI
devices attached to it. The root bridge has its own set of configuration
registers.
Change-Id: I2b15630cf5a0fc5938e66986a65782c6939fcf55
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072577
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
PciConfiguration manages the PCI configuration space registers for a PCI
device or bridge. Add accessors and setters for the registers that need
to be modified for basic PCI device enumeration.
Change-Id: I4a5a71d55a3c5f7fb52ce81acef51cb4291130c8
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072574
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Zach Reizner <zachr@chromium.org>
Start PCI work by defining an enum to represent the four PCI interrupt
lines.
Change-Id: Ib95a4e4a03f0d6917ed2bed4b1afb97d18ff4f9e
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072573
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
