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2b286f4305
In pcie enhanced configuration access, register bit number is 12, in order to support such PciConfigAddress, this commit make register bit number variable, it could be 8 or 12 decided by caller. BUG=b:197877871 TEST=tools/presubmit Change-Id: I96a317896b9536742534bee86f0e8f1acc323292 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305940 Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> |
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Cargo.toml |