crosvm/aarch64
Daniel Verkamp cf68e76280 aarch64: use 64-bit memory space for PCI MMIO range
This makes the PCI root bridge's MMIO range consistent with the
newly-added device memory range.  We already fill out the full 64-bit
address/size fields, so we might as well use the corresponding bus range
type.

BUG=None
TEST=boot termina on kevin

Change-Id: I9ecad38c76dac764853c6232cc486cfc7737a269
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1579327
Tested-by: kokoro <noreply+kokoro@google.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
2019-05-23 07:35:19 -07:00
..
src aarch64: use 64-bit memory space for PCI MMIO range 2019-05-23 07:35:19 -07:00
Cargo.toml lints: Enforce sorted order for enum variants 2019-04-13 18:37:55 -07:00