mirror of
https://chromium.googlesource.com/crosvm/crosvm
synced 2025-02-06 02:25:23 +00:00
cf68e76280
This makes the PCI root bridge's MMIO range consistent with the newly-added device memory range. We already fill out the full 64-bit address/size fields, so we might as well use the corresponding bus range type. BUG=None TEST=boot termina on kevin Change-Id: I9ecad38c76dac764853c6232cc486cfc7737a269 Signed-off-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1579327 Tested-by: kokoro <noreply+kokoro@google.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Zach Reizner <zachr@chromium.org> |
||
---|---|---|
.. | ||
src | ||
Cargo.toml |