Daniel Verkamp 6d136c86b6 arch: ensure only one IRQ is used per PCI device-pin combination ... Previously, the IRQ allocation logic could allocate different IRQ numbers for the same pin (INTA#/INTB#/...) within the same device. This would result in conflicting MPTable IRQ source entries where the bus, device, and pin were the same but the IRQ number was different. This was not apparent in practice in most cases, since almost all PCI devices in crosvm support MSI-X, so the pin-based interrupts were not used. However, the xhci device does not support MSI/MSI-X, so it was affected when it was allocated one of the conflicting IRQ numbers. Now that the generate_pci_root code in arch chooses the pin numbers before assigning IRQs, we can fix this problem by recording previously used pin to irq mappings within each PCI (bus, device) and reusing them when appropriate. BUG=b:3834424 TEST=Attach USB device to ARCVM on hatch TEST=Start crosvm with >32 PCI devices and `pci=nomsi` Change-Id: Ie40bcc93e71fc494bff1c5fb2d916249099be87a Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3840307 Commit-Queue: Daniel Verkamp <dverkamp@chromium.org> Tested-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-by: Vineeth Pillai <vineethrp@google.com> Reviewed-by: Noah Gold <nkgold@google.com>		2022-08-20 00:51:16 +00:00
..
src	arch: ensure only one IRQ is used per PCI device-pin combination	2022-08-20 00:51:16 +00:00
Cargo.toml	arch: split platform lib code into sys mod.	2022-07-14 00:08:33 +00:00