Dmitry Torokhov b41b9bbb42 devices: pci: wire up reset via 0xcf9 register ... This is a bit of a hack, but crosvm does not support overlapping IO/MMIO regions, so we have to handle reset register in PciConfigIo handler (which covers 0xcf8 - 0xcff range) instead of installing a dedicated reset handler separate from PCI root handler. BUG=b:3169569 TEST=Try rebooting Manatee booted with "reboot=p" Change-Id: I79991f456d4aaaab2c904e312996208aa72ab6ec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3316833 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Dmitry Torokhov <dtor@chromium.org>		2021-12-08 06:32:59 +00:00
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src	devices: pci: wire up reset via 0xcf9 register	2021-12-08 06:32:59 +00:00
Cargo.toml	Refactoring: Move various general purpose crates to common/	2021-10-29 22:31:43 +00:00