crosvm/hypervisor
Tomasz Jeznach eb1114ced7 crosvm-direct: support for variable IOAPIC irqs.
More recent Intel IO-APICs can support more than 24 interrupt
lines. This change enables variable size of IO-APIC lines for
user level IO-APIC emulation code (split-irqchip).

Reported version and supported IO-APIC registes matching ICH10
implementation of IO-APIC device.

BUG=b:181795297
TEST=boot and allocate irq from upper range.

Change-Id: I56480befb39c4c268266f04e4a93105402248772
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2733579
Tested-by: Tomasz Jeznach <tjeznach@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2021-03-18 22:02:54 +00:00
..
src crosvm-direct: support for variable IOAPIC irqs. 2021-03-18 22:02:54 +00:00
Cargo.toml make hypervisor traits object safe 2020-10-15 14:31:20 +00:00