Daniel Verkamp f04ba1a14b aarch64: limit PCI IRQ allocator to number of SPIs ... The previous limit was incorrect, as we are using SPI (Shared Peripheral Interrupt) type interrupt sources for PCI devices, but the limit was based on the total number of SPI + PPI interrupts. This fixes interrupt delivery when many PCI devices are used on arm platforms. BUG=b:218757314 TEST=Run crosvm with 32+ block devices on trogdor Change-Id: Ie89bc5b7115117d8acaca30ff758b9342940b450 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3453119 Reviewed-by: Dmitry Torokhov <dtor@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>		2022-02-12 00:07:05 +00:00
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src	aarch64: limit PCI IRQ allocator to number of SPIs	2022-02-12 00:07:05 +00:00
.build_test_skip	build_test: misc options, improvements, amd bug fixes	2020-10-15 13:40:32 +00:00
.windows_build_test_skip	Upstream windows build/test script	2022-01-28 00:55:08 +00:00
Cargo.toml	Refactoring: Move various general purpose crates to common/	2021-10-29 22:31:43 +00:00