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https://chromium.googlesource.com/crosvm/crosvm
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f12c5ea7b4
Call KVM_REG_ARM_PSCI_VERSION to see the PSCI version and use the value when creating a device-tree node. Also stop setting PSCI constants which are ignored by kernel. BUG=chromium:1141902 TEST=run crosvm on krane and check /proc/device-tree/psci/compatible Change-Id: I4b8ed7620d7f0e2205b84b5f08cfaa5ae8d94339 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2529289 Tested-by: Keiichi Watanabe <keiichiw@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
72 lines
2.5 KiB
Rust
72 lines
2.5 KiB
Rust
// Copyright 2020 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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use base::Result;
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use downcast_rs::impl_downcast;
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use crate::{Hypervisor, IrqRoute, IrqSource, IrqSourceChip, Vcpu, Vm};
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/// Represents a version of Power State Coordination Interface (PSCI).
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pub struct PsciVersion {
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pub major: u32,
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pub minor: u32,
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}
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/// A wrapper for using a VM on aarch64 and getting/setting its state.
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pub trait VmAArch64: Vm {
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/// Gets the `Hypervisor` that created this VM.
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fn get_hypervisor(&self) -> &dyn Hypervisor;
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/// Create a Vcpu with the specified Vcpu ID.
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fn create_vcpu(&self, id: usize) -> Result<Box<dyn VcpuAArch64>>;
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}
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/// A wrapper around creating and using a VCPU on aarch64.
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pub trait VcpuAArch64: Vcpu {
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/// Does ARM-specific initialization of this VCPU. Inits the VCPU with the preferred target
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/// VCPU type and the specified `features`, and resets the value of all registers to defaults.
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/// All VCPUs should be created before calling this function.
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fn init(&self, features: &[VcpuFeature]) -> Result<()>;
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/// Initializes the ARM Performance Monitor Unit v3 on this VCPU, with overflow interrupt number
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/// `irq`.
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fn init_pmu(&self, irq: u64) -> Result<()>;
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/// Sets the value of a register on this VCPU. `reg_id` is the register ID, as specified in the
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/// KVM API documentation for KVM_SET_ONE_REG.
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fn set_one_reg(&self, reg_id: u64, data: u64) -> Result<()>;
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/// Gets the value of a register on this VCPU. `reg_id` is the register ID, as specified in the
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/// KVM API documentation for KVM_GET_ONE_REG.
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fn get_one_reg(&self, reg_id: u64) -> Result<u64>;
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/// Gets the current PSCI version.
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fn get_psci_version(&self) -> Result<PsciVersion>;
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}
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impl_downcast!(VcpuAArch64);
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// Convenience constructors for IrqRoutes
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impl IrqRoute {
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pub fn gic_irq_route(irq_num: u32) -> IrqRoute {
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IrqRoute {
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gsi: irq_num,
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source: IrqSource::Irqchip {
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chip: IrqSourceChip::Gic,
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pin: irq_num,
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},
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}
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}
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}
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/// A feature that can be enabled on a VCPU with `VcpuAArch64::init`.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum VcpuFeature {
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/// Emulate PSCI v0.2 (or a future revision backward compatible with v0.2) for the VCPU.
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PsciV0_2,
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/// Emulate Performance Monitor Unit v3 for the VCPU.
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PmuV3,
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/// Starts the VCPU in a power-off state.
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PowerOff,
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}
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