mirror of
https://chromium.googlesource.com/crosvm/crosvm
synced 2025-02-11 20:56:12 +00:00
b4bd00fdad
I have been running into Debug-printed error messages too often and
needing to look up in the source code each level of nested errors to
find out from the comment on the error variant what the short name of
the variant means in human terms. Worse, many errors (like the one shown
below) already had error strings written but were being printed from the
calling code in the less helpful Debug representation anyway.
Before:
[ERROR:src/main.rs:705] The architecture failed to build the vm: NoVarEmpty
After:
[ERROR:src/main.rs:705] The architecture failed to build the vm: /var/empty doesn't exist, can't jail devices.
TEST=cargo check --all-features
TEST=FEATURES=test emerge-amd64-generic crosvm
Change-Id: I77122c7d6861b2d610de2fff718896918ab21e10
Reviewed-on: https://chromium-review.googlesource.com/1469225
Commit-Ready: David Tolnay <dtolnay@chromium.org>
Tested-by: David Tolnay <dtolnay@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
46 lines
1.5 KiB
Rust
46 lines
1.5 KiB
Rust
// Copyright 2017 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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use sys_util::EventFd;
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use BusDevice;
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/// A i8042 PS/2 controller that emulates just enough to shutdown the machine.
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pub struct I8042Device {
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reset_evt: EventFd,
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}
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impl I8042Device {
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/// Constructs a i8042 device that will signal the given event when the guest requests it.
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pub fn new(reset_evt: EventFd) -> I8042Device {
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I8042Device { reset_evt }
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}
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}
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// i8042 device is mapped I/O address 0x61. We partially implement two 8-bit
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// registers: port 0x61 (I8042_PORT_B_REG, offset 0 from base of 0x61), and
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// port 0x64 (I8042_COMMAND_REG, offset 3 from base of 0x61).
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impl BusDevice for I8042Device {
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fn debug_label(&self) -> String {
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"i8042".to_owned()
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}
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fn read(&mut self, offset: u64, data: &mut [u8]) {
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if data.len() == 1 && offset == 3 {
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data[0] = 0x0;
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} else if data.len() == 1 && offset == 0 {
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// Like kvmtool, we return bit 5 set in I8042_PORT_B_REG to
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// avoid hang in pit_calibrate_tsc() in Linux kernel.
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data[0] = 0x20;
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}
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}
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fn write(&mut self, offset: u64, data: &[u8]) {
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if data.len() == 1 && data[0] == 0xfe && offset == 3 {
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if let Err(e) = self.reset_evt.write(1) {
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error!("failed to trigger i8042 reset event: {}", e);
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}
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}
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}
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}
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