2 commits

Author	SHA1	Message	Date
Zixuan Chen	82b5f8dc90	Perf: speed up utf16 and wasm (#90) ... * perf: remove unused transact field * perf: micro optimization * bench: fix bench * bench: add utf16 bench * chore: refine diagnose * perf: speedup utf16 lookup * perf: use better utf16 len counter * refactor: use js to cast Loro/Transaction * refactor: map and list use __loro and __txn * test: configure ci vitest * chore: ci	2023-04-03 09:29:25 +08:00
Zixuan Chen	18d32384a5	refactor: move loro-core to loro-internal	2023-01-16 20:08:43 +08:00

Renamed from crates/loro-core/examples/automerge_x100.rs (Browse further)