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(Overriding Makefiles): Don't suggest using .DEFAULT; that loses if the
target file exists. Instead recommend the combination of a match-anything rule and a force target.
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make.texinfo
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make.texinfo
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@ -1247,13 +1247,12 @@ include one in the other, and add more targets or variable definitions.
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However, if the two makefiles give different commands for the same
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However, if the two makefiles give different commands for the same
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target, @code{make} will not let you just do this. But there is another way.
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target, @code{make} will not let you just do this. But there is another way.
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@cindex @code{.DEFAULT}, used to override
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@cindex match-anything rule, used to override
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In the containing makefile (the one that wants to include the other),
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In the containing makefile (the one that wants to include the other),
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you can use the @code{.DEFAULT} special target to say that to remake
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you can use a match-anything pattern rule to say that to remake any
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any target that cannot be made from the information in the containing
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target that cannot be made from the information in the containing
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makefile, @code{make} should look in another makefile.
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makefile, @code{make} should look in another makefile.
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@xref{Last Resort, , Defining Last-Resort Default Rules},
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@xref{Pattern Rules}, for more information on pattern rules.
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for more information on @code{.DEFAULT}.
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For example, if you have a makefile called @file{Makefile} that says how
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For example, if you have a makefile called @file{Makefile} that says how
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to make the target @samp{foo} (and other targets), you can write a
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to make the target @samp{foo} (and other targets), you can write a
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@ -1263,18 +1262,27 @@ makefile called @file{GNUmakefile} that contains:
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foo:
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foo:
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frobnicate > foo
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frobnicate > foo
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.DEFAULT:
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%: force
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@@$(MAKE) -f Makefile $@@
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@@$(MAKE) -f Makefile $@@
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force: ;
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@end example
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@end example
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If you say @samp{make foo}, @code{make} will find @file{GNUmakefile},
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If you say @samp{make foo}, @code{make} will find @file{GNUmakefile},
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read it, and see that to make @file{foo}, it needs to run the command
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read it, and see that to make @file{foo}, it needs to run the command
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@samp{frobnicate > foo}. If you say @samp{make bar}, @code{make} will
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@samp{frobnicate > foo}. If you say @samp{make bar}, @code{make} will
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find no way to make @file{bar} in @file{GNUmakefile}, so it will use the
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find no way to make @file{bar} in @file{GNUmakefile}, so it will use the
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commands from @code{.DEFAULT}: @samp{make -f Makefile bar}. If
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commands from the pattern rule: @samp{make -f Makefile bar}. If
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@file{Makefile} provides a rule for updating @file{bar}, @code{make}
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@file{Makefile} provides a rule for updating @file{bar}, @code{make}
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will apply the rule. And likewise for any other target that
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will apply the rule. And likewise for any other target that
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@file{GNUmakefile} does not say how to make.@refill
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@file{GNUmakefile} does not say how to make.
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The way this works is that the pattern rule has a pattern of just
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@samp{%}, so it matches any target whatever. The rule specifies a
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dependency @file{force}, to guarantee that the commands will be run even
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if the target file already exists. We give @file{force} target empty
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commands to prevent @code{make} from searching for an implicit rule to
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build it---otherwise it would apply the same match-anything rule to
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@file{force} itself and create a dependency loop!
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@node Rules, Commands, Makefiles, Top
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@node Rules, Commands, Makefiles, Top
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@chapter Writing Rules
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@chapter Writing Rules
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