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fix(cpuid): add cache and TLB information

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Signed-off-by: Changyuan Lyu <changyuanl@google.com>
This commit is contained in:
Changyuan Lyu 2024-08-04 09:58:36 -07:00 committed by Lencerf
parent 2c419dae89
commit 8baaef0bfc
1 changed files with 8 additions and 0 deletions
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8
alioth/src/board/x86_64.rs
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@ -80,6 +80,14 @@ impl<V: Vm> ArchBoard<V> {
}
}
}
let highest = unsafe { __cpuid(0x8000_0000) }.eax;
for func in [0x8000_0005, 0x8000_0006] {
if func > highest {
break;
}
let host_cpuid = unsafe { __cpuid(func) };
cpuids.insert(CpuidIn { func, index: None }, host_cpuid);
}
Ok(Self {
cpuids,
sev_ap_eip: AtomicU32::new(0),