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Revert "x86: cpuid: clear FSRM bit"

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This reverts commit fa1e6e3249.

Reason for revert: This turns out to have been a bug in the kernel that can be addressed with the following patch:

```
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 2d7ea5480ec3..71b412f820c7 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -328,6 +328,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
                         pr_info("Disabled fast string operations\n");
                         setup_clear_cpu_cap(X86_FEATURE_REP_GOOD);
                         setup_clear_cpu_cap(X86_FEATURE_ERMS);
+                        setup_clear_cpu_cap(X86_FEATURE_FSRM);
                 }
         }
```

Original change's description:
> x86: cpuid: clear FSRM bit
>
> This seems to cause an unexpected fault under Bruschetta, and possibly
> any other software using Ice Lake's Fast Short REP MOVs.
>
> This is a port of a patch from AOSP[1].
>
> [1]: https://android-review.googlesource.com/c/platform/external/crosvm/+/2138413
>
> BUG=b:228795137
> TEST=deployed to brya board, bruschetta bootup no longer hangs after
> entering smpboot
>
> Change-Id: Ifb4e8af104ee8e2945598ea4c06001cbd98c40e9
> Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3913990
> Auto-Submit: Mike Gerow <gerow@google.com>
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>

Bug: b:228795137
Change-Id: I7bd8be1b33315dddb5b73df62303bd967ac0573e
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3916337
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Auto-Submit: Mike Gerow <gerow@google.com>
This commit is contained in:
Mike Gerow 2022-09-23 19:05:24 +00:00 committed by crosvm LUCI
parent 31a517d5e2
commit bb9603b19f
1 changed files with 0 additions and 5 deletions
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5
x86_64/src/cpuid.rs
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@ -47,7 +47,6 @@ const ECX_TOPO_SMT_TYPE: u32 = 1; // SMT type.
const ECX_TOPO_CORE_TYPE: u32 = 2; // CORE type.
const ECX_HCFC_PERF_SHIFT: u32 = 0; // Presence of IA32_MPERF and IA32_APERF.
const EAX_CPU_CORES_SHIFT: u32 = 26; // Index of cpu cores in the same physical package.
const EDX_FSRM_SHIFT: u32 = 4; // Fast Short REP MOV
const EDX_HYBRID_CPU_SHIFT: u32 = 15; // Hybrid. The processor is identified as a hybrid part.
const EAX_HWP_SHIFT: u32 = 7; // Intel Hardware P-states.
const EAX_HWP_NOTIFICATION_SHIFT: u32 = 8; // IA32_HWP_INTERRUPT MSR is supported
@ -204,10 +203,6 @@ pub fn adjust_cpuid(entry: &mut CpuIdEntry, ctx: &CpuIdContext) {
}
}
7 => {
// b/228795137 Clear X86 FSRM feature which breaks Bruschetta boot. Remove
// once this has been fixed.
entry.cpuid.edx &= !(1 << EDX_FSRM_SHIFT);
if ctx.cpu_config.host_cpu_topology && entry.index == 0 {
// Safe because we pass 7 and 0 for this call and the host supports the
// `cpuid` instruction