Commit graph

176 commits

Author SHA1 Message Date
Vaibhav Nagarnaik
b8bfdb496f irqchip: Add IrqEventSource for each event
This allows irq processing thread to log statistics and metrics and
track them using the source of the device. To be upstreamed later.

Introduce `PCI_VENDOR_ID_CROSVM` which identifies devices created by
crosvm. And introduce `CrosvmDeviceId` which adds a unique device ID for
each type of crosvm device.

BUG=b:213149158
BUG=b:213152505
TEST=Compiled.

Change-Id: Ica1374d8a2d8fd627c9397553bb7fb62baeaff7d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3687418
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vaibhav Nagarnaik <vnagarnaik@google.com>
2022-06-17 18:44:20 +00:00
Daniel Verkamp
fb641f67e4 resources: introduce AddressRange type
The AddressRange type is used for representing contiguous memory or I/O
address ranges, mostly equivalent to RangeInclusive<u64> but with the
added benefit of implementing Copy and not carrying an extra field used
only for iteration, which we don't need.

Using an inclusive range means we can represent the full address space
with no weird corner cases around the upper limit of the range (for
example, an AddressRange covering the full 64-bit space can be
represented as start: 0, end: u64::MAX).

AddressRange also replaces the previous MemRegion type, which was a
start/size pair.

This normalizes the interface of the resources crates to use
AddressRange rather than a start/size pair; more cleanups throughout the
tree may be possible, but this commit attempts to be somewhat smaller to
have a hope of being reviewable.

BUG=b:222769529
TEST=tools/presubmit --all
TEST=cargo test -p resources

Change-Id: I8c90bdc28456221b5107ef7e589233315ea739c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3696671
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-16 20:29:26 +00:00
Masami Hiramatsu
eb83ee79b6 aarch64: Add Goldfish battery to aarch64 crosvm
Add Goldfish battery to aarch64 crosvm. The guest kernel will
see the goldfish battery node on the FDT.
This copies the seccomp policy for the battery from x86-64.

BUG=b:214124318
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
TEST=android-sh -c 'dumpsys battery'
TEST=tast run ${DUT} arc.PerfBoot.vm

Change-Id: I8212e760db5ffbc5d01442cfa7930baa5962ef6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3686713
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Masami Hiramatsu <mhiramat@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Masami Hiramatsu <mhiramat@google.com>
2022-06-15 02:46:45 +00:00
Peter Collingbourne
4f7d84e5b9 Fix some clippy warnings on aarch64.
Change-Id: Iac9a9540c585a08374c966a1014c6746fbba0554
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3687061
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Auto-Submit: Peter Collingbourne <pcc@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-06-06 16:58:32 +00:00
Dapeng Mi
4080aaf9b3 crosvm: expose cpu frequency and temperature CPUID bits to guest
Turbostat detects if CPU frequency and temperature features are
supported by reading several CPUID entries bits. Expose these
CPUID bits to guest when enable-pnp-data option is enabled.

Several MSR registers which turbostat depends on have been already
passed through when ITMT is enabled. Adding code to detect this and
avoid to doubly pass through.

BUG=b:229770963
TEST=Run "turbostat" in Chrome OS guest and show correct value.

Change-Id: Ieebaf616d544cb187a80ec6f3313a246ebf54bb2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3641466
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-31 02:03:38 +00:00
Mike Gerow
539ba3dcc9 Reland "devices: debugcon: add bochs-style debugcon device"
This is a reland of commit 129840471d

Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>

Bug: b:233610263
Change-Id: I2f2125da95e8907f4f0c16930952e9b765d33e6c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671087
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-05-26 19:25:02 +00:00
Mike Gerow
d46572f47e Revert "devices: debugcon: add bochs-style debugcon device"
This reverts commit 129840471d.

Reason for revert: This conflicts with https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3600167 breaking the build

Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>

Bug: b:233610263
Change-Id: Ia70540c3041611f59968cb7929b238eecfe2530d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671082
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
2022-05-26 18:23:30 +00:00
Mike Gerow
129840471d devices: debugcon: add bochs-style debugcon device
This allows for creating a simple write-only debug connection that uses
a single IO port. This method is supported by both bochs and qemu[1].

The main motivation here is to help in improving crosvm's ability to
boot OVMF, which makes use of this simple debug device on port 0x402.
For that one would use `--serial
type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.

Note that serde_keyvalue doesn't support parsing hex values, hence the
need to use `1026`, but I intend to address that as well to allow the
more natural `debugcon_port=0x402` phrasing.

[1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c

BUG=b:233610263

Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Mike Gerow <gerow@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-26 17:13:59 +00:00
Vineeth Pillai
81b5e616d6 crosvm: vm_events: consolidate vm events into one framework.
crosvm waits on events like exit, reset, crash, guest panic etc and
uses eventfd to wait on these events. As of now, we have 4 eventfds
and may increase.

This is an attempt to consolidate all Vm events into one framework.
Use Tube instead of Event to get consistent behavior between OSes.
Implement a wrapper over Tube to have a consistent API for events.

BUG=None.
TEST=Built crosvm. Ran a minimal vm to panic and verified that crosvm
received the panic event. cargo test on devices.

Change-Id: I313d428de5e3ce3b879982f913918ec0a4a72c35
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3480577
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vineeth Pillai <vineethrp@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
2022-05-20 18:04:21 +00:00
Sahitya Tummala
a6945f4a49 aarch64: Add support for loading kernel image formatted as ELF
This is done similar to x86 platform to check if a kernel image have
ELF signature first and if it doesn't, then it is passed to the Image
loader as a fallback.

BUG=b:232360323

Change-Id: I27b362952bd7f2678d1c7646b1b1c052c3518fca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3646449
Commit-Queue: Steven Moreland <smoreland@google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-13 18:48:12 +00:00
Junichi Uekawa
78a12954cf crosvm: Keep one MsrFileType per vcpu.
Each vcpu has a vcpu->MsrDev file mapping. Instead of trying to create
an instance at first use, just keep an empty map in the beginning.

BUG=b:215297064
TEST=boot volteer-manatee

Change-Id: Ic5a63b0427a6441f190da3917b5f272bbb8ec778
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3611369
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-09 08:11:40 +00:00
Daniel Verkamp
45b0920767 doc: add a top-level comment to all crates
This provides at least a minimal one-line description to show what each
crate is about.

BUG=None
TEST=tools/cargo-doc

Change-Id: I26732e8c29062e622d5be09bdc120a49d564b9fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3630422
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-06 20:46:57 +00:00
Andrew Walbran
0465b61b1e Move PVTIME down below MMIO_BASE.
This leaves the region between 0x4000_0000 and the start of RAM free of
MMIO, which simplifies the stage 1 page table mappings needed by the
guest, and makes room for the pVM firmware allocation to be expanded.

TEST=tools/dev_container tools/run_tests --target=vm:aarch64

Change-Id: Ibae73a946cadd16e6f03559d23cc256f4b9d3f3d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3627454
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-05-06 13:01:31 +00:00
Shikha Panwar
dac771b644 Add --unprotected-vm-with-firmware flag to simulate protected mode.
This runs an unprotected VM but uses the same memory layout as for a
protected VM, loads pVM firmware, disables the same devices as for
protected mode. This is useful for debugging pVM firmware and other
protected VM issues.

TEST=crosvm --extended-status run --disable-sandbox --serial=stdout,hardware=serial,num=1 --unprotected-vm-with-firmware=pvmfw --bios=test_bootloader
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
BUG=b:230475926

Change-Id: I9a8077d76874f10221071ea312291659d81da3d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3623760
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-04 09:36:08 +00:00
ZhaoLiu
0c2ce08ca1 x86_64: Preparation for ITMT scheduling in Guest
With Intel Turbo Boost Max Technology 3.0, (ITMT),  the maximum turbo
frequencies of some cores in a CPU package may be higher than for the
other cores in the same package. In that case, make the scheduler prefer
to run tasks on the CPUs with higher max turbo frequencies, to achieve
better performance.

When vCPUs 1:1 map to pCPUs, ITMT scheduling feature can benefit
performance of Guest. So when user sets `--itmt`, crosvm will check if
`--host-cpu-topology` is set or if `--cpu-affinity` is set for 1:1
mapping.

In kernel, ITMT scheduling feature depends on intel_pstate driver and
ACPI CPPC support.

To setup intel_pstate driver and pass CPPC capability check, we need
emulate related MSRs in userspace:

- MSR_HWP_CAPABILITIES and MSR_TURBO_RATIO_LIMIT: intel_pstate driver
  only needs to read. So we passthrough them to Guest. But please note,
  to be compatible with the configuration in initramfs, use `FromCPU0`
  Temporarily.

- MSR_PM_ENABLE and MSR_HWP_REQUEST: they are MSRs to control HWP.
  When intel_pstate driver is initializing, the driver will close/open
  HWP by writing into MSR_PM_ENABLE, and the driver also needs to set
  performance policy by writing some hints into MSR_HWP_REQUEST.
  Note that we don't want Guest's behavior to affect the performance
  control of the host, so use 'emulate' handler for them.

- MSR_PLATFORM_INFO: this MSR is emulated in kernel with a fault value
  by default. intel_pstate doesn't want this fault value, so we ask
  this MSR to exit to userspace and give it a real value.

- MSR_IA32_PERF_CTL: intel_pstate driver use this MSR to set the min
  pstate in the initialization. So use 'emulate' handler for this MSR.

Since of `FromCPU0` setting of MSR_HWP_CAPABILITIES, ITMT scheduling
will set the same priority for each core so optimization will not work.

BUG=b:225375705
TEST=Set `--itmt` and check /proc/sys/kernel/sched_itmt_enabled

Change-Id: Icfa85ffa15c3b977c3b62a1f8a379c4c2f5fc49d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3575511
Commit-Queue: Zhao Liu <zhao1.liu@intel.corp-partner.google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-04-25 08:21:16 +00:00
ZhaoLiu
b969ded8a5 crosvm: Support MSR emulation
At present, crosvm can support handle RDMSR in userspace by read MSR of
Host directly. This is the RDMSR passthrough in userpace.

This patch adds more MSR handler support, including:
- WRMSR passthrough: write the corresponding MSR of Host directly in
  userspace; The control of MSR will work on host;
- RDMSR emulation: crosvm uses a dummy MSR value to let Guest reads on.
  This value can be different with real MSR of Host;
- WRMSR emulation: crosvm uses a dummy MSR value to let Guest writes
  into. This means the control of MSR won't really work (on Host).

BUG=b:225375705
TEST=Set `--userspace-msr=0x1a2,type=r,action=pass,from=cpu0`

Change-Id: I3276dd651464ef7b695e2ddd433793d59128af9b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3575508
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-04-25 07:50:55 +00:00
Elliot Berman
c903a58f86 aarch64: Abstract KVM register read/writes
Remove KVM-specific code from the generic aarch64 module by providing a
generic enum for hypervisor-specific vCpus to use instead:
VCpuRegAArch64.

Change-Id: Idd7379ad35943622c534b5e0d954ec15f9d15b41
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3586723
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Moreland <smoreland@google.com>
2022-04-18 17:58:06 +00:00
Elliot Berman
53d9530f36 linux: Drop kvm_ prefix from vcpu_ids
Simple rename to emphasize that vcpu_ids are not KVM-specific.

Change-Id: Icaf8a5f15a83021cf48467b0b8d0042ab0ab4a92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3586010
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Moreland <smoreland@google.com>
2022-04-15 22:23:32 +00:00
Daniel Verkamp
ceb5ef155a aarch64: fdt: add PSCI compatible string tests
Move the PSCI version to compatible code to a function so it can be more
easily tested and add a few basic unit tests.

BUG=b:227142928
TEST=tools/dev_container tools/run_tests --target=vm:aarch64

Change-Id: I383b6e9df76f26995adab6fe980fd29fe1fcdf0a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3573362
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-04-07 18:08:55 +00:00
Daniel Verkamp
1d1372f742 aarch64: fdt: fix PSCI v0.1 case
This was accidentally creating a new `compatible` variable that shadowed
the other one rather than updating its value.

BUG=b:227142928
TEST=tools/presubmit

Change-Id: I11ec4f89501315d9946a5641493673ab6e938b76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3573361
Reviewed-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-04-07 18:08:54 +00:00
Dmitry Torokhov
f021a62130 devices: irqchip: add specialized register_{edge|level}_irq_event()
The new specialized functions take IrqEdgeEvent and IrqLevelEvent
arguments, so that callers can use them directly.

BUG=None
TEST=./tools/presubmit

Change-Id: I2c1272e31f6b20eb22743b003bd23b9c1105cda6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3548066
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
2022-04-07 01:41:52 +00:00
Dmitry Torokhov
be3bbc0f37 devices: pl030: convert to using IrqEdgeEvent
This converts pl030 code to use IrqEdgeEvent.

BUG=None
TEST=./tools/presubmit

Change-Id: Ibc216d1989d90880176e70821f3d98ccc41302f0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3572999
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
2022-04-06 18:54:48 +00:00
Pierre-Clément Tosi
3a81c077b3 aarch64: fdt: Fix create_psci_node
Don't format the PSCI compatible string from the version received from
KVM as that generates invalid strings for versions other than 0.2 and
1.0. Instead, assume backward compatibility from 0.2 onwards and pass
only those that are relevant and supported by the kernel driver or pass
the PSCI v0.1 compatible string otherwise.

BUG=b:227142928
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
TEST=booted a protected VM from the AOSP fork + checked DT node

Change-Id: I3b6a05b487751435b4e0e1c7a6f4643fece02ca7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3560156
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
2022-04-05 13:26:23 +00:00
Pierre-Clément Tosi
bdef378a27 arch: fdt: Pass &[&str] to property_string_list
Make the function take the more versatile slice of string slices,
instead of requiring caller code to generate the dynamic Vec and String
types, which can easily be converted back into those primitive types.

Note: no functional change intended.

BUG=b:227142928
TEST=booted a protected VM from the AOSP fork

Change-Id: I61701700efdacab4cfc5f5dd3df761e06a372065
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3560154
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
2022-04-05 13:26:21 +00:00
David Stevens
dc790f39c8 arch: refactor pci range generation
Add a method to SystemAllocator that returns a vector of all pools and
use it to generate the PCI ranges in build_vm. This also fixes a bug
where x86 used the size as the end address for the high_mmio region.

BUG=b:181736020
TEST=tast run trogdor|hatch arc.Boot.vm

Change-Id: Id4a300ec61c15bc08fb069b80428b22461ca935b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516668
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
2022-03-17 01:58:14 +00:00
David Stevens
e4db417895 pstore: reserve ramoops region in system allocator
Remove the ramoops region from high_mmio when constructing the system
allocator. This means the aarch64 code no longer needs to manually
adjust high_mmio when determining the pci regions.

BUG=b:181736020
TEST=Check arcvm pstore still works

Change-Id: I81ca398a1984f0efb30c0a4d4b620bd50fe9df85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516667
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
2022-03-17 01:58:13 +00:00
David Stevens
00ab01e920 resources: use RangeInclusive to create allocator
Use RangeInclusive when constructing an AddressAllocator. A followup
change will add an iterator constructor, so using RangeInclusive makes
that API cleaner.

BUG=b:181736020
TEST=cargo test

Change-Id: I59c28b9cbd06c86482c0c57704fc2753a7886ac6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516666
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
2022-03-17 01:58:12 +00:00
David Stevens
097623dce4 arch: return system allocator config
Have the arch code return the SystemAllocatorConfig instead of a
SystemAllocator. This will be used to allow the core code to apply
additional restrictions on top of the arch code's restrictions.

BUG=b:181736020
TEST=compiles

Change-Id: I4d9ca277f039586e664648492c8744967dcd2ee5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516665
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
2022-03-17 01:58:11 +00:00
Dennis Kempin
ef516189db Refactoring: Move common/base into base
Executes the script in https://crrev.com/c/3530502

BUG=b:223206469
TEST=presubmit

Change-Id: Ibeffdc8de0b2270f070e60bb2de8d9fdc78a2a6d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3530503
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
2022-03-17 00:01:27 +00:00
Peter Fang
6ca0323c87 acpi: support fixed power button event in command line
Support injecting an ACPI fixed power button event using "powerbtn" in
the command line.

BUG=b:199383670
TEST=boot Linux kernel and trigger a power button event

Change-Id: I5ed57f533fa3d91043491fd1f0695223a139fc7a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3350492
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
2022-03-10 16:59:20 +00:00
Anton Romanov
bed40ad547 crosvm: migrate to Rust 2021 edition
BUG=none
TEST=cq

Change-Id: I0059c970879b78bfd40b6ce58b10debcf154b50f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3508322
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Anton Romanov <romanton@google.com>
2022-03-09 01:16:03 +00:00
Daniel Verkamp
0ae13d221e Require memoffset version 0.6
Chrome OS does not currently package memoffset-0.6.5 (only 0.6.4), so
building within cros_sdk will fail to find the expected crate. We don't
need any API requirements past what is provided by 0.6, so just request
that. At the same time, upgrade the cros_asyncv2 memoffset from 0.5 to
0.6 so we don't need two separate versions. (The crosvm ebuild was not
requiring a 0.5 version, so this was technically a bug.)

BUG=None
TEST=cargo build
TEST=emerge-hatch crosvm

Change-Id: I2b6c778cdbf57977e6fffd73867e0c4818c44a61
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3502625
Auto-Submit: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Vineeth Pillai <vineethrp@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-03-04 05:15:35 +00:00
Andrew Walbran
27f2133dba Use memoffset::offset_of rather than implementing it ourselves.
TEST=tools/dev_container tools/run_tests
TEST=tools/dev_container tools/run_tests --target=vm:aarch64

Change-Id: Iccdf0653001599d76c742db27349e274f7a4bb23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3497460
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Andrew Walbran <qwandor@google.com>
2022-03-02 08:33:02 +00:00
Andrew Walbran
40b470c6b5 Log reset_type and cookie for PSCI SYSTEM_RESET2.
These may be used by the pVM firmware or bootloader for protected VMs on
Android to indicate the reason why a VM failed to boot, such as a
verification failure, and so we want to have them in the logs for
debugging.

BUG=b:220084045

Change-Id: I449873fb85d590d9e7978a93648e90586ecfff10
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3473452
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Andrew Walbran <qwandor@google.com>
2022-03-01 16:03:06 +00:00
Junichi Uekawa
629e352c67 Revert "system_allocator: allow more than one region to be in the pool"
This reverts commit d2d66bc0a4.

Reason for revert: It turns out that adding the first page to the pool
of memory managed by the MMIO allocator has undesired consequences
since crosvm will actually use it for MMIO regions. The first page
 has special semantics in other code though, and thus we get stray
accesses to this region, with hard-to-predict consequences.

BUG=b:188011323
TEST=cq

Original change's description:
> system_allocator: allow more than one region to be in the pool
>
> Allows crosvm-direct to have 0-0xfff regions to be mapped.
>
> limitations: Only the first regions gets reflected in the
> pool_base/pool_size.
>
> BUG=b:188011323
> BUG=b:184815519
> TEST=build
>
> Change-Id: I9da3cb2b8d5611068f9323d6ebf62f44162838b4
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3450017
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Tested-by: kokoro <noreply+kokoro@google.com>
> Commit-Queue: Junichi Uekawa <uekawa@chromium.org>

Bug: b:188011323
Bug: b:184815519
Change-Id: Ib42b3007662a7a49ad876b83a01f1bb88d09d5f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3497136
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Mattias Nissler <mnissler@chromium.org>
Commit-Queue: Mattias Nissler <mnissler@chromium.org>
2022-03-01 11:19:44 +00:00
Vikram Auradkar
ae5118f5c7 Enable windows tests for a few crates
Run tests for sys_util_core, poll_token_derive and balloon_control on
windows.

Using dotfiles to disable/serialize test runs of a subset of crates does
not work well with third party crates as it forces us to commit the dot
file to the crate.

The patch modifies and uses the script that runs linux tests.
This patch also allows us to
- build/test child crate even if parent crate has disabled build/test.
- avoid building crosvm if it is not explicitly specified.

RIP short lived .windows_build_test_skip. You allowed us to run noop
kokoro tests.

Test: py .\tools\impl\test_runner.py --arch x86_64
Bug: b:215610772
Change-Id: Icc6d04ffd7c0c33d4f60aeac16fc7d23881c387d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3459809
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
2022-02-18 03:18:58 +00:00
Daniel Verkamp
310d4b3593 aarch64: generalize FDT PCI node parameters
Rather than hard-coding knowledge of the low and high MMIO regions and
configuration space access region in the fdt creation code, we can move
this to the aarch64 VM setup code that has more visibility into memory
layout and allocators.

This will enable future refactoring to collapse the multiple MMIO
regions into a single allocator.

BUG=b:188011323
TEST=Boot Crostini on trogdor

Change-Id: I2709b831d94b467b772cd37465e3431072c7a49d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3457884
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-02-16 21:44:56 +00:00
Junichi Uekawa
d2d66bc0a4 system_allocator: allow more than one region to be in the pool
Allows crosvm-direct to have 0-0xfff regions to be mapped.

limitations: Only the first regions gets reflected in the
pool_base/pool_size.

BUG=b:188011323
BUG=b:184815519
TEST=build

Change-Id: I9da3cb2b8d5611068f9323d6ebf62f44162838b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3450017
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-02-15 00:46:48 +00:00
Daniel Verkamp
f04ba1a14b aarch64: limit PCI IRQ allocator to number of SPIs
The previous limit was incorrect, as we are using SPI (Shared Peripheral
Interrupt) type interrupt sources for PCI devices, but the limit was
based on the total number of SPI + PPI interrupts.

This fixes interrupt delivery when many PCI devices are used on arm
platforms.

BUG=b:218757314
TEST=Run crosvm with 32+ block devices on trogdor

Change-Id: Ie89bc5b7115117d8acaca30ff758b9342940b450
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3453119
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-02-12 00:07:05 +00:00
Daniel Verkamp
7a06e688f7 aarch64: enlarge low MMIO allocator region
The previous size was only 1 MiB, which can be exhausted when enough
virtio-pci devices or other users of low MMIO are added. Increase it to
32 MiB to allow the addition of more devices, and while we are at it,
change the base of the low MMIO region to a more nicely aligned offset.

BUG=b:218757314
TEST=Run crosvm with 28 block devices on trogdor

Change-Id: Iea30d02f5c529be133b0fcb3666bf2ca72d5a90c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3453117
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-02-12 00:07:04 +00:00
Junichi Uekawa
67d4219489 system_allocator: use config object pattern for constructing
In preparation to allow multiple low memory regions to be passed on, I wanted to
make initialization simpler.

Introduce `MemRegion` struct instead of tuple to help me understand it is a base
and size.

BUG=b:188011323
TEST=build

Change-Id: Ie8b54354a25c478d5ad0a0185b7e07d28840dd87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3439666
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
2022-02-10 08:46:07 +00:00
Dennis Kempin
d9af9d6a58 clippy: Fix aarch64 and crosvm-fuzz
Add proper conditional compilation flags. This will largely still skip
most of those crates, but at least the syntax will be checked.

BUG=b:192373803
TEST=./tools/clippy

Change-Id: I66d29ccdfec01f3a83b682a9cc135188fdc830cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3438705
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
2022-02-04 19:16:05 +00:00
Andrew Walbran
985491ae73 Pass HypervisorCap by value rather than reference.
It's a simple enum, so it should be Copy.

TEST=tools/dev_container tools/run_tests
TEST=tools/dev_container tools/run_tests --target=vm:aarch64

Change-Id: Ieeacedb10fa6a93d6cdd9878097c66aa936f8e30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3420329
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Andrew Walbran <qwandor@google.com>
2022-01-28 11:02:45 +00:00
Vikram Auradkar
0108238474 Upstream windows build/test script
The patch also adds files to skip building and testing crates on
windows. When we run
```
tools/windows/build_test.py --skip_file_name .windows_build_test_skip
```

the build/test succeeds without actually doing anything as build/test
for all crates is skipped by creating '.windows_build_test_skip'.

Bug: 213170957
Test: Ran script on downstream repo
Change-Id: Iebd2cea463ee722be4feaed88229e1fb5e9fd6c5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3417918
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
2022-01-28 00:55:08 +00:00
Daniel Verkamp
a06f22f2ac aarch64: actually load kernel at 8MB
The comment above indicates that it was intended to be loaded at an
offset of 8 megabytes, but it was missing a zero, so it was being loaded
at an offset of 512 kilobytes instead. Fix the constant to match the
comment.

Fixes a warning from newer kernels:

  Kernel image misaligned at boot, please fix your bootloader!

BUG=None
TEST=Boot Linux 5.10 on trogdor64, verify no error in dmesg

Change-Id: I2650d23458a13adff89a7f214734866c47d6f7cc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3364972
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-01-11 22:41:43 +00:00
Daniel Verkamp
891ea3e88a aarch64: limit high MMIO addresses to VM phys addr range
The high MMIO region of the system allocator was previously set up with
the upper limit of 2**64 - 1, but physical addresses on actual systems
are not that large. Now that pmem allocates from the upper end of the
high MMIO region, the size of the allocator actually matters.

Limit the aarch64 high MMIO allocator to the VM's physical address size
so that addresses at the end of the allocation range are usable and pmem
devices can be created on aarch64.

BUG=b:210727578
TEST=Boot with pmem device on aarch64

Change-Id: I67962c2b03f0f265349ae889c988eb69ef526f4a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3366858
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-01-11 22:41:42 +00:00
Daniel Verkamp
3c2abaf838 aarch64: deduplicate MMIO region calculations
The get_high_mmio_base_size() function duplicates and hard-codes the
math from get_platform_mmio_base_size(). Since these are both only
called in one location now, pull them into get_resource_allocator() so
the plat_mmio variables can be used instead of duplicating the math.

Also reorder the SystemAllocator::builder() calls so that they are in
the same order as the layout of the regions in memory; this makes no
functional difference, but it is less confusing to read.

BUG=b:210727578
TEST=Boot crosvm on trogdor64

Change-Id: I1238e5b1d412e41d0b4b9be5b93b59fec6598734
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3373451
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-01-11 22:41:41 +00:00
Daniel Verkamp
a475cd4754 aarch64: avoid recalculating MMIO regions
Rather than calling get_high_mmio_base_size() twice, once in the Arch
create_system_allocator() callback and once in build_vm(), it would be
cleaner to retrieve the MMIO regions from the existing system allocator.
Add a couple of helper functions to AddressAllocator so we can get the
original region back.

This also helps in the next patch, which will pass additional
information to get_high_mmio_base_size() that is messy to calculate
twice.

BUG=b:210727578
TEST=Boot crosvm on trogdor64

Change-Id: Ia5c7d7c7ff7edb406a9b4af482b277204f865474
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3373450
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-01-11 22:41:40 +00:00
Daniel Verkamp
6f4f8223b8 hypervisor: add API to query VM physaddr size
Add a function that returns the size of guest physical addresses. This
wraps KVM_CAP_ARM_VM_IPA_SIZE on aarch64 and CPUID to query host
physical address size on x86_64. This replaces the phy_max_address_bits
function from x86_64, and all callers are migrated to use the new Vm
function instead.

BUG=b:210727578
TEST=check on trogdor64 with debug prints

Change-Id: I3107fe6357fcf166b7ad0e2a7c55919705da3b0c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3364971
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-01-11 22:41:38 +00:00
Andrew Walbran
00f1c9fd46 Update to the latest pKVM ABI.
This involves two main changes:
 * Protected VMs must be created with KVM_VM_TYPE_ARM_PROTECTED.
 * pVM firmware is now loaded by IPA rather than memslot ID.

There are also a lot of trivial changes because the ProtectionType enum
was moved from the devices crate to the hypervisor crate.

BUG=b:209794844
TEST=Will tested manually with patched kernel and dummy firmware

Change-Id: I1dd75e20063ca4736f155292ca5f70b94664fdd9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3330204
Auto-Submit: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
2022-01-04 19:35:27 +00:00