crosvm is switching the import style to use one import per line.
While more verbose, this will greatly reduce the occurence of merge
conflicts going forward.
Note: This is using a nightly feature of rustfmt. So it's a one-off
re-format only. We are considering adding a nightly toolchain to
enable the feature permanently.
BUG=b:239937122
TEST=CQ
Change-Id: Id2dd4dbdc0adfc4f8f3dd1d09da1daafa2a39992
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3784345
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Loading 32-bit images is needed for kvm-unit-tests.
BUG=b:233317135
TEST=boots, new unit tests
Change-Id: I6ba63255e0e2993f3735ef81489f64dbd0bb6374
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3764465
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Auto-Submit: Steven Richman <srichman@google.com>
Tested-by: Steven Richman <srichman@google.com>
Commit-Queue: Steven Richman <srichman@google.com>
This adds a new dt node identified by "qemu,vm-watchdog". The watchdog
is instantiated per-cpu and each instance has the following layout
described in this document:
https://docs.google.com/document/d/1DYmk2roxlwHZsOfcJi8xDMdWOHAmomvs2SDh7KPud3Y/edit?resourcekey=0-oSNabc-t040a1q0K4cyI8Q#heading=h.4hbqud2zl941
The watchdog uses an internal clock which is driven by the
timerfd at regular intervals. When the internal clock expires, a counter
value is decremented. When the counter register reaches value "0",
the watchdog expires. To prevent 'watchdog expiration', regular pet
events should be sent from the guest kernel driver.
BUG=b:213422094
Signed-off-by: Sebastian Ene <sebastianene@google.com>
Change-Id: Ic8c0488ffdfed1a43b6deb34b72d37f46e5e18a2
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3768290
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Highlights:
* goldfish battery never worked on Windows, but it sort of compiled
anyways downstream. This CL makes it unix only because it never worked
on Windows as a device anyway.
BUG=b:237597358
TEST=builds
Change-Id: Ia5fc3b5e5fcd243d8454646b00a6857085d018ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3741432
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Rather than having a single vcpu_init instance that is used for all
VCPUs, make vcpu_init into a Vec so it can store different initial state
for each VCPU. This allows us to set up e.g. bootstrap processor state
differently than other processors, and it also means that the VcpuInit
struct doesn't need to be Copy.
BUG=b:237095693
TEST=Boot Linux with >1 CPU
Change-Id: I0ebfdc2dbd84d0817e3f75c2c852e4320b9e77c5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723798
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
There have been two evolutions of providing the TSC cpuid leaf
(aka 0x15) to the guest.
a) For CrosVM on Windows, we have been providing the leaf
unconditionally. Furthermore, we've not been using the
exact host leaf; instead, we calibrate the TSC frequency
and provide that value in the leaf. This was done because
the actual cpuid leaf values are not as accurate as
we needed them to be to drive a guest clocksource.
b) In CrosVM mainline, 4080aaf9b3
introduced the flag enable_pnp / enable_pnp_data, and
provides the exact host 0x15 leaf to the guest if the
flag is enabled.
This CL adds a new hypervisor capability (CalibratedTscLeafRequired) to control
whether or not the calibrated TSC leaf should be used, in addition to a new CLI
option to force it on hypervisors where it isn't enabled by default. The new
option is `--force_calibrated_tsc_leaf`.
BUG=b:213152505
TEST=builds upstream, battletested downstream on WHPX.
Change-Id: I611422808a9e10578c0ddcbd211ae902f937685f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3698993
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Previously, we were loading ELF kernels at the provided kernel_start
address plus the p_paddr (physical address) field of each program
header. This resulted in the kernel being loaded after a big gap of
zero bytes, which accidentally worked on x86_64 because 0x00 0x00
encodes a valid instruction, and the entry point was at the beginning of
the first section, so execution would effectively "nop slide" its way
from the supposed entry point all the way to the actual beginning of the
correct code. In addition, the Linux kernel entry point is compiled as
position-independent code, so the mismatched address did not matter.
Fix this by loading ELF kernels at whatever physical address they
specify, without adding any extra offset. The load_kernel() function
still accepts a start address, but this is now used simply to verify
that the ELF file does not try to load any sections outside of the
desired kernel region.
As a demonstration, we can look at the instructions at the kernel's
declared entry point (0x1000000 for a normal x86-64 Linux kernel in ELF
format) by attaching to the gdb stub and running:
(gdb) disas 0x1000000,+8
With the old behavior, we get purely 0x00 0x00 opcodes, decoding as:
0x0000000001000000: add BYTE PTR [rax],al
0x0000000001000002: add BYTE PTR [rax],al
0x0000000001000004: add BYTE PTR [rax],al
0x0000000001000006: add BYTE PTR [rax],al
With the new behavior, we get the correct entry point instructions:
0x0000000001000000: lea rsp,[rip+0x1203f51] # 0x2203f58
0x0000000001000007: lea rdi,[rip+0xfffffffffffffff2] # 0x1000000
BUG=b:234155022
TEST=cargo test -p kernel_loader
TEST=Boot x86-64 ELF vmlinux kernel
Change-Id: Iae4c8db022674e6311e54dffe479a1ed430a1ef4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673612
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anton Romanov <romanton@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
The new LoadedKernel structure also splits out the size and end address,
which are both used in different places (x86_64 wants end, aarch64 wants
both).
BUG=b:234155022
TEST=tools/presubmit
TEST=cargo test -p kernel_loader
Change-Id: I86a7e412c983f29a2c614cc9e6896aa11db6ba94
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673611
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
This will be used to pass the initial register values for each vcpu.
Each architecture can define its own variant of the initial vcpu state.
BUG=b:234155022
TEST=tools/presubmit --all
Change-Id: I696a5ecda202c1ff0681f0b89b89b9eec11e27e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673615
Reviewed-by: Anton Romanov <romanton@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This allows irq processing thread to log statistics and metrics and
track them using the source of the device. To be upstreamed later.
Introduce `PCI_VENDOR_ID_CROSVM` which identifies devices created by
crosvm. And introduce `CrosvmDeviceId` which adds a unique device ID for
each type of crosvm device.
BUG=b:213149158
BUG=b:213152505
TEST=Compiled.
Change-Id: Ica1374d8a2d8fd627c9397553bb7fb62baeaff7d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3687418
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vaibhav Nagarnaik <vnagarnaik@google.com>
The AddressRange type is used for representing contiguous memory or I/O
address ranges, mostly equivalent to RangeInclusive<u64> but with the
added benefit of implementing Copy and not carrying an extra field used
only for iteration, which we don't need.
Using an inclusive range means we can represent the full address space
with no weird corner cases around the upper limit of the range (for
example, an AddressRange covering the full 64-bit space can be
represented as start: 0, end: u64::MAX).
AddressRange also replaces the previous MemRegion type, which was a
start/size pair.
This normalizes the interface of the resources crates to use
AddressRange rather than a start/size pair; more cleanups throughout the
tree may be possible, but this commit attempts to be somewhat smaller to
have a hope of being reviewable.
BUG=b:222769529
TEST=tools/presubmit --all
TEST=cargo test -p resources
Change-Id: I8c90bdc28456221b5107ef7e589233315ea739c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3696671
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Add Goldfish battery to aarch64 crosvm. The guest kernel will
see the goldfish battery node on the FDT.
This copies the seccomp policy for the battery from x86-64.
BUG=b:214124318
TEST=create VM with parameter "--battery" or "--battery=type=goldfish"
TEST=android-sh -c 'dumpsys battery'
TEST=tast run ${DUT} arc.PerfBoot.vm
Change-Id: I8212e760db5ffbc5d01442cfa7930baa5962ef6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3686713
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Masami Hiramatsu <mhiramat@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Masami Hiramatsu <mhiramat@google.com>
Turbostat detects if CPU frequency and temperature features are
supported by reading several CPUID entries bits. Expose these
CPUID bits to guest when enable-pnp-data option is enabled.
Several MSR registers which turbostat depends on have been already
passed through when ITMT is enabled. Adding code to detect this and
avoid to doubly pass through.
BUG=b:229770963
TEST=Run "turbostat" in Chrome OS guest and show correct value.
Change-Id: Ieebaf616d544cb187a80ec6f3313a246ebf54bb2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3641466
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This is a reland of commit 129840471d
Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>
Bug: b:233610263
Change-Id: I2f2125da95e8907f4f0c16930952e9b765d33e6c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671087
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This reverts commit 129840471d.
Reason for revert: This conflicts with https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3600167 breaking the build
Original change's description:
> devices: debugcon: add bochs-style debugcon device
>
> This allows for creating a simple write-only debug connection that uses
> a single IO port. This method is supported by both bochs and qemu[1].
>
> The main motivation here is to help in improving crosvm's ability to
> boot OVMF, which makes use of this simple debug device on port 0x402.
> For that one would use `--serial
> type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
>
> Note that serde_keyvalue doesn't support parsing hex values, hence the
> need to use `1026`, but I intend to address that as well to allow the
> more natural `debugcon_port=0x402` phrasing.
>
> [1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
>
> BUG=b:233610263
>
> Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Mike Gerow <gerow@google.com>
> Tested-by: kokoro <noreply+kokoro@google.com>
Bug: b:233610263
Change-Id: Ia70540c3041611f59968cb7929b238eecfe2530d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3671082
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Auto-Submit: Mike Gerow <gerow@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
This allows for creating a simple write-only debug connection that uses
a single IO port. This method is supported by both bochs and qemu[1].
The main motivation here is to help in improving crosvm's ability to
boot OVMF, which makes use of this simple debug device on port 0x402.
For that one would use `--serial
type=stdout,hardware=debugcon,debugcon_port=1026` or something similar.
Note that serde_keyvalue doesn't support parsing hex values, hence the
need to use `1026`, but I intend to address that as well to allow the
more natural `debugcon_port=0x402` phrasing.
[1]: https://github.com/qemu/qemu/blob/master/hw/char/debugcon.c
BUG=b:233610263
Change-Id: I73238e5c35925668d133bfaa542fcbcf1e28765f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3661255
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Mike Gerow <gerow@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
crosvm waits on events like exit, reset, crash, guest panic etc and
uses eventfd to wait on these events. As of now, we have 4 eventfds
and may increase.
This is an attempt to consolidate all Vm events into one framework.
Use Tube instead of Event to get consistent behavior between OSes.
Implement a wrapper over Tube to have a consistent API for events.
BUG=None.
TEST=Built crosvm. Ran a minimal vm to panic and verified that crosvm
received the panic event. cargo test on devices.
Change-Id: I313d428de5e3ce3b879982f913918ec0a4a72c35
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3480577
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vineeth Pillai <vineethrp@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
This is done similar to x86 platform to check if a kernel image have
ELF signature first and if it doesn't, then it is passed to the Image
loader as a fallback.
BUG=b:232360323
Change-Id: I27b362952bd7f2678d1c7646b1b1c052c3518fca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3646449
Commit-Queue: Steven Moreland <smoreland@google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Each vcpu has a vcpu->MsrDev file mapping. Instead of trying to create
an instance at first use, just keep an empty map in the beginning.
BUG=b:215297064
TEST=boot volteer-manatee
Change-Id: Ic5a63b0427a6441f190da3917b5f272bbb8ec778
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3611369
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This provides at least a minimal one-line description to show what each
crate is about.
BUG=None
TEST=tools/cargo-doc
Change-Id: I26732e8c29062e622d5be09bdc120a49d564b9fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3630422
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This leaves the region between 0x4000_0000 and the start of RAM free of
MMIO, which simplifies the stage 1 page table mappings needed by the
guest, and makes room for the pVM firmware allocation to be expanded.
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
Change-Id: Ibae73a946cadd16e6f03559d23cc256f4b9d3f3d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3627454
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This runs an unprotected VM but uses the same memory layout as for a
protected VM, loads pVM firmware, disables the same devices as for
protected mode. This is useful for debugging pVM firmware and other
protected VM issues.
TEST=crosvm --extended-status run --disable-sandbox --serial=stdout,hardware=serial,num=1 --unprotected-vm-with-firmware=pvmfw --bios=test_bootloader
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
BUG=b:230475926
Change-Id: I9a8077d76874f10221071ea312291659d81da3d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3623760
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
With Intel Turbo Boost Max Technology 3.0, (ITMT), the maximum turbo
frequencies of some cores in a CPU package may be higher than for the
other cores in the same package. In that case, make the scheduler prefer
to run tasks on the CPUs with higher max turbo frequencies, to achieve
better performance.
When vCPUs 1:1 map to pCPUs, ITMT scheduling feature can benefit
performance of Guest. So when user sets `--itmt`, crosvm will check if
`--host-cpu-topology` is set or if `--cpu-affinity` is set for 1:1
mapping.
In kernel, ITMT scheduling feature depends on intel_pstate driver and
ACPI CPPC support.
To setup intel_pstate driver and pass CPPC capability check, we need
emulate related MSRs in userspace:
- MSR_HWP_CAPABILITIES and MSR_TURBO_RATIO_LIMIT: intel_pstate driver
only needs to read. So we passthrough them to Guest. But please note,
to be compatible with the configuration in initramfs, use `FromCPU0`
Temporarily.
- MSR_PM_ENABLE and MSR_HWP_REQUEST: they are MSRs to control HWP.
When intel_pstate driver is initializing, the driver will close/open
HWP by writing into MSR_PM_ENABLE, and the driver also needs to set
performance policy by writing some hints into MSR_HWP_REQUEST.
Note that we don't want Guest's behavior to affect the performance
control of the host, so use 'emulate' handler for them.
- MSR_PLATFORM_INFO: this MSR is emulated in kernel with a fault value
by default. intel_pstate doesn't want this fault value, so we ask
this MSR to exit to userspace and give it a real value.
- MSR_IA32_PERF_CTL: intel_pstate driver use this MSR to set the min
pstate in the initialization. So use 'emulate' handler for this MSR.
Since of `FromCPU0` setting of MSR_HWP_CAPABILITIES, ITMT scheduling
will set the same priority for each core so optimization will not work.
BUG=b:225375705
TEST=Set `--itmt` and check /proc/sys/kernel/sched_itmt_enabled
Change-Id: Icfa85ffa15c3b977c3b62a1f8a379c4c2f5fc49d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3575511
Commit-Queue: Zhao Liu <zhao1.liu@intel.corp-partner.google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
At present, crosvm can support handle RDMSR in userspace by read MSR of
Host directly. This is the RDMSR passthrough in userpace.
This patch adds more MSR handler support, including:
- WRMSR passthrough: write the corresponding MSR of Host directly in
userspace; The control of MSR will work on host;
- RDMSR emulation: crosvm uses a dummy MSR value to let Guest reads on.
This value can be different with real MSR of Host;
- WRMSR emulation: crosvm uses a dummy MSR value to let Guest writes
into. This means the control of MSR won't really work (on Host).
BUG=b:225375705
TEST=Set `--userspace-msr=0x1a2,type=r,action=pass,from=cpu0`
Change-Id: I3276dd651464ef7b695e2ddd433793d59128af9b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3575508
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Remove KVM-specific code from the generic aarch64 module by providing a
generic enum for hypervisor-specific vCpus to use instead:
VCpuRegAArch64.
Change-Id: Idd7379ad35943622c534b5e0d954ec15f9d15b41
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3586723
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Moreland <smoreland@google.com>
Simple rename to emphasize that vcpu_ids are not KVM-specific.
Change-Id: Icaf8a5f15a83021cf48467b0b8d0042ab0ab4a92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3586010
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Steven Moreland <smoreland@google.com>
Move the PSCI version to compatible code to a function so it can be more
easily tested and add a few basic unit tests.
BUG=b:227142928
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
Change-Id: I383b6e9df76f26995adab6fe980fd29fe1fcdf0a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3573362
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This was accidentally creating a new `compatible` variable that shadowed
the other one rather than updating its value.
BUG=b:227142928
TEST=tools/presubmit
Change-Id: I11ec4f89501315d9946a5641493673ab6e938b76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3573361
Reviewed-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The new specialized functions take IrqEdgeEvent and IrqLevelEvent
arguments, so that callers can use them directly.
BUG=None
TEST=./tools/presubmit
Change-Id: I2c1272e31f6b20eb22743b003bd23b9c1105cda6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3548066
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
Don't format the PSCI compatible string from the version received from
KVM as that generates invalid strings for versions other than 0.2 and
1.0. Instead, assume backward compatibility from 0.2 onwards and pass
only those that are relevant and supported by the kernel driver or pass
the PSCI v0.1 compatible string otherwise.
BUG=b:227142928
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
TEST=booted a protected VM from the AOSP fork + checked DT node
Change-Id: I3b6a05b487751435b4e0e1c7a6f4643fece02ca7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3560156
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Make the function take the more versatile slice of string slices,
instead of requiring caller code to generate the dynamic Vec and String
types, which can easily be converted back into those primitive types.
Note: no functional change intended.
BUG=b:227142928
TEST=booted a protected VM from the AOSP fork
Change-Id: I61701700efdacab4cfc5f5dd3df761e06a372065
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3560154
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Add a method to SystemAllocator that returns a vector of all pools and
use it to generate the PCI ranges in build_vm. This also fixes a bug
where x86 used the size as the end address for the high_mmio region.
BUG=b:181736020
TEST=tast run trogdor|hatch arc.Boot.vm
Change-Id: Id4a300ec61c15bc08fb069b80428b22461ca935b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516668
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Remove the ramoops region from high_mmio when constructing the system
allocator. This means the aarch64 code no longer needs to manually
adjust high_mmio when determining the pci regions.
BUG=b:181736020
TEST=Check arcvm pstore still works
Change-Id: I81ca398a1984f0efb30c0a4d4b620bd50fe9df85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516667
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Use RangeInclusive when constructing an AddressAllocator. A followup
change will add an iterator constructor, so using RangeInclusive makes
that API cleaner.
BUG=b:181736020
TEST=cargo test
Change-Id: I59c28b9cbd06c86482c0c57704fc2753a7886ac6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516666
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Have the arch code return the SystemAllocatorConfig instead of a
SystemAllocator. This will be used to allow the core code to apply
additional restrictions on top of the arch code's restrictions.
BUG=b:181736020
TEST=compiles
Change-Id: I4d9ca277f039586e664648492c8744967dcd2ee5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516665
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Support injecting an ACPI fixed power button event using "powerbtn" in
the command line.
BUG=b:199383670
TEST=boot Linux kernel and trigger a power button event
Change-Id: I5ed57f533fa3d91043491fd1f0695223a139fc7a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3350492
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Chrome OS does not currently package memoffset-0.6.5 (only 0.6.4), so
building within cros_sdk will fail to find the expected crate. We don't
need any API requirements past what is provided by 0.6, so just request
that. At the same time, upgrade the cros_asyncv2 memoffset from 0.5 to
0.6 so we don't need two separate versions. (The crosvm ebuild was not
requiring a 0.5 version, so this was technically a bug.)
BUG=None
TEST=cargo build
TEST=emerge-hatch crosvm
Change-Id: I2b6c778cdbf57977e6fffd73867e0c4818c44a61
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3502625
Auto-Submit: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Vineeth Pillai <vineethrp@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
These may be used by the pVM firmware or bootloader for protected VMs on
Android to indicate the reason why a VM failed to boot, such as a
verification failure, and so we want to have them in the logs for
debugging.
BUG=b:220084045
Change-Id: I449873fb85d590d9e7978a93648e90586ecfff10
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3473452
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Andrew Walbran <qwandor@google.com>
This reverts commit d2d66bc0a4.
Reason for revert: It turns out that adding the first page to the pool
of memory managed by the MMIO allocator has undesired consequences
since crosvm will actually use it for MMIO regions. The first page
has special semantics in other code though, and thus we get stray
accesses to this region, with hard-to-predict consequences.
BUG=b:188011323
TEST=cq
Original change's description:
> system_allocator: allow more than one region to be in the pool
>
> Allows crosvm-direct to have 0-0xfff regions to be mapped.
>
> limitations: Only the first regions gets reflected in the
> pool_base/pool_size.
>
> BUG=b:188011323
> BUG=b:184815519
> TEST=build
>
> Change-Id: I9da3cb2b8d5611068f9323d6ebf62f44162838b4
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3450017
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Tested-by: kokoro <noreply+kokoro@google.com>
> Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Bug: b:188011323
Bug: b:184815519
Change-Id: Ib42b3007662a7a49ad876b83a01f1bb88d09d5f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3497136
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Mattias Nissler <mnissler@chromium.org>
Commit-Queue: Mattias Nissler <mnissler@chromium.org>
Run tests for sys_util_core, poll_token_derive and balloon_control on
windows.
Using dotfiles to disable/serialize test runs of a subset of crates does
not work well with third party crates as it forces us to commit the dot
file to the crate.
The patch modifies and uses the script that runs linux tests.
This patch also allows us to
- build/test child crate even if parent crate has disabled build/test.
- avoid building crosvm if it is not explicitly specified.
RIP short lived .windows_build_test_skip. You allowed us to run noop
kokoro tests.
Test: py .\tools\impl\test_runner.py --arch x86_64
Bug: b:215610772
Change-Id: Icc6d04ffd7c0c33d4f60aeac16fc7d23881c387d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3459809
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
Rather than hard-coding knowledge of the low and high MMIO regions and
configuration space access region in the fdt creation code, we can move
this to the aarch64 VM setup code that has more visibility into memory
layout and allocators.
This will enable future refactoring to collapse the multiple MMIO
regions into a single allocator.
BUG=b:188011323
TEST=Boot Crostini on trogdor
Change-Id: I2709b831d94b467b772cd37465e3431072c7a49d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3457884
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Allows crosvm-direct to have 0-0xfff regions to be mapped.
limitations: Only the first regions gets reflected in the
pool_base/pool_size.
BUG=b:188011323
BUG=b:184815519
TEST=build
Change-Id: I9da3cb2b8d5611068f9323d6ebf62f44162838b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3450017
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
The previous limit was incorrect, as we are using SPI (Shared Peripheral
Interrupt) type interrupt sources for PCI devices, but the limit was
based on the total number of SPI + PPI interrupts.
This fixes interrupt delivery when many PCI devices are used on arm
platforms.
BUG=b:218757314
TEST=Run crosvm with 32+ block devices on trogdor
Change-Id: Ie89bc5b7115117d8acaca30ff758b9342940b450
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3453119
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The previous size was only 1 MiB, which can be exhausted when enough
virtio-pci devices or other users of low MMIO are added. Increase it to
32 MiB to allow the addition of more devices, and while we are at it,
change the base of the low MMIO region to a more nicely aligned offset.
BUG=b:218757314
TEST=Run crosvm with 28 block devices on trogdor
Change-Id: Iea30d02f5c529be133b0fcb3666bf2ca72d5a90c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3453117
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
