Run tests for sys_util_core, poll_token_derive and balloon_control on
windows.
Using dotfiles to disable/serialize test runs of a subset of crates does
not work well with third party crates as it forces us to commit the dot
file to the crate.
The patch modifies and uses the script that runs linux tests.
This patch also allows us to
- build/test child crate even if parent crate has disabled build/test.
- avoid building crosvm if it is not explicitly specified.
RIP short lived .windows_build_test_skip. You allowed us to run noop
kokoro tests.
Test: py .\tools\impl\test_runner.py --arch x86_64
Bug: b:215610772
Change-Id: Icc6d04ffd7c0c33d4f60aeac16fc7d23881c387d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3459809
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
Rather than hard-coding knowledge of the low and high MMIO regions and
configuration space access region in the fdt creation code, we can move
this to the aarch64 VM setup code that has more visibility into memory
layout and allocators.
This will enable future refactoring to collapse the multiple MMIO
regions into a single allocator.
BUG=b:188011323
TEST=Boot Crostini on trogdor
Change-Id: I2709b831d94b467b772cd37465e3431072c7a49d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3457884
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Allows crosvm-direct to have 0-0xfff regions to be mapped.
limitations: Only the first regions gets reflected in the
pool_base/pool_size.
BUG=b:188011323
BUG=b:184815519
TEST=build
Change-Id: I9da3cb2b8d5611068f9323d6ebf62f44162838b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3450017
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
The previous limit was incorrect, as we are using SPI (Shared Peripheral
Interrupt) type interrupt sources for PCI devices, but the limit was
based on the total number of SPI + PPI interrupts.
This fixes interrupt delivery when many PCI devices are used on arm
platforms.
BUG=b:218757314
TEST=Run crosvm with 32+ block devices on trogdor
Change-Id: Ie89bc5b7115117d8acaca30ff758b9342940b450
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3453119
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The previous size was only 1 MiB, which can be exhausted when enough
virtio-pci devices or other users of low MMIO are added. Increase it to
32 MiB to allow the addition of more devices, and while we are at it,
change the base of the low MMIO region to a more nicely aligned offset.
BUG=b:218757314
TEST=Run crosvm with 28 block devices on trogdor
Change-Id: Iea30d02f5c529be133b0fcb3666bf2ca72d5a90c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3453117
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
In preparation to allow multiple low memory regions to be passed on, I wanted to
make initialization simpler.
Introduce `MemRegion` struct instead of tuple to help me understand it is a base
and size.
BUG=b:188011323
TEST=build
Change-Id: Ie8b54354a25c478d5ad0a0185b7e07d28840dd87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3439666
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Add proper conditional compilation flags. This will largely still skip
most of those crates, but at least the syntax will be checked.
BUG=b:192373803
TEST=./tools/clippy
Change-Id: I66d29ccdfec01f3a83b682a9cc135188fdc830cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3438705
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
It's a simple enum, so it should be Copy.
TEST=tools/dev_container tools/run_tests
TEST=tools/dev_container tools/run_tests --target=vm:aarch64
Change-Id: Ieeacedb10fa6a93d6cdd9878097c66aa936f8e30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3420329
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Andrew Walbran <qwandor@google.com>
The patch also adds files to skip building and testing crates on
windows. When we run
```
tools/windows/build_test.py --skip_file_name .windows_build_test_skip
```
the build/test succeeds without actually doing anything as build/test
for all crates is skipped by creating '.windows_build_test_skip'.
Bug: 213170957
Test: Ran script on downstream repo
Change-Id: Iebd2cea463ee722be4feaed88229e1fb5e9fd6c5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3417918
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
The comment above indicates that it was intended to be loaded at an
offset of 8 megabytes, but it was missing a zero, so it was being loaded
at an offset of 512 kilobytes instead. Fix the constant to match the
comment.
Fixes a warning from newer kernels:
Kernel image misaligned at boot, please fix your bootloader!
BUG=None
TEST=Boot Linux 5.10 on trogdor64, verify no error in dmesg
Change-Id: I2650d23458a13adff89a7f214734866c47d6f7cc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3364972
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The high MMIO region of the system allocator was previously set up with
the upper limit of 2**64 - 1, but physical addresses on actual systems
are not that large. Now that pmem allocates from the upper end of the
high MMIO region, the size of the allocator actually matters.
Limit the aarch64 high MMIO allocator to the VM's physical address size
so that addresses at the end of the allocation range are usable and pmem
devices can be created on aarch64.
BUG=b:210727578
TEST=Boot with pmem device on aarch64
Change-Id: I67962c2b03f0f265349ae889c988eb69ef526f4a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3366858
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The get_high_mmio_base_size() function duplicates and hard-codes the
math from get_platform_mmio_base_size(). Since these are both only
called in one location now, pull them into get_resource_allocator() so
the plat_mmio variables can be used instead of duplicating the math.
Also reorder the SystemAllocator::builder() calls so that they are in
the same order as the layout of the regions in memory; this makes no
functional difference, but it is less confusing to read.
BUG=b:210727578
TEST=Boot crosvm on trogdor64
Change-Id: I1238e5b1d412e41d0b4b9be5b93b59fec6598734
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3373451
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Rather than calling get_high_mmio_base_size() twice, once in the Arch
create_system_allocator() callback and once in build_vm(), it would be
cleaner to retrieve the MMIO regions from the existing system allocator.
Add a couple of helper functions to AddressAllocator so we can get the
original region back.
This also helps in the next patch, which will pass additional
information to get_high_mmio_base_size() that is messy to calculate
twice.
BUG=b:210727578
TEST=Boot crosvm on trogdor64
Change-Id: Ia5c7d7c7ff7edb406a9b4af482b277204f865474
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3373450
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Add a function that returns the size of guest physical addresses. This
wraps KVM_CAP_ARM_VM_IPA_SIZE on aarch64 and CPUID to query host
physical address size on x86_64. This replaces the phy_max_address_bits
function from x86_64, and all callers are migrated to use the new Vm
function instead.
BUG=b:210727578
TEST=check on trogdor64 with debug prints
Change-Id: I3107fe6357fcf166b7ad0e2a7c55919705da3b0c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3364971
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This involves two main changes:
* Protected VMs must be created with KVM_VM_TYPE_ARM_PROTECTED.
* pVM firmware is now loaded by IPA rather than memslot ID.
There are also a lot of trivial changes because the ProtectionType enum
was moved from the devices crate to the hypervisor crate.
BUG=b:209794844
TEST=Will tested manually with patched kernel and dummy firmware
Change-Id: I1dd75e20063ca4736f155292ca5f70b94664fdd9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3330204
Auto-Submit: Andrew Walbran <qwandor@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Since PciRoot has been modified into Arc<Mutex<>>, RunnableLinuxVm->root_config
could be changed from PciConfigArch to PciRoot also, this could simplify code
and reduce two functions from PciConfigArch.
BUG=b:197877871
TEST=tools/presubmit
Change-Id: Ibc18587900d6f8259ac1d6f8fe7b3ea4fedad07e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305942
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Instead of returning 0 for both shutdown and reset/reboot, let's have
shutdown continue returning 0, but reset will now return 32 exit code,
so that callers will have an option to handle this case differently.
BUG=b:3169569
TEST=Examine crosvm exit codes when resetting and shutting down VM
Change-Id: I2c7c11b7f8c8528744f7e25e5d17c6fa9810f409
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3316835
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
Reserved 64MB mmio space for pcie enhanced configuration access,
and added it into mmio_bus with PciConfigMmio.
Now pci_root will be added into PciConfigIo and PciConfigMmio, so
Arc<Mux<pci_root>> is used.
BUG=b:197877871
TEST=tools/presubmit
Change-Id: Ic90a4cc3dfb00b09358478e129cc8a16e91012c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305941
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
In pcie enhanced configuration access, register bit number is 12, in order to
support such PciConfigAddress, this commit make register bit number
variable, it could be 8 or 12 decided by caller.
BUG=b:197877871
TEST=tools/presubmit
Change-Id: I96a317896b9536742534bee86f0e8f1acc323292
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305940
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
PcieRootPort implement hotplug_bus trait, it should be added into
RunnableLinuxVm->hotplug_bus, so create pcie root port when
RunnableLinuxVm->hotplug_bus is ready.
Many hotplug bus may exist, when a hotplug device is added, is_match()
should be called on each hotplug bus before attach that device to
the bus.
BUG=b:185084350
TEST=Boot a vm with passthrough device and check its function
Change-Id: I89dbc091f336b3f9d0435b52963f7cf62d408a67
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2955570
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Extend the ABI in protected mode to provide the protected VM firmware
with the size of the loaded image by using register x2.
BUG=b:203505371
TEST=presubmit
Change-Id: Ib01b88dcce2f3fbfba759599d7fce9de62de720c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3259937
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This currently gives a compiler warning:
warning: dereferencing a null pointer
--> aarch64/src/lib.rs:71:19
|
71 | unsafe { &(*(0 as *const $str))$(.$field)* $([$idx])* as *const _ as usize }
| ^^^^^^^^^^^^^^^^^^^^^ this code causes undefined behavior when executed
...
622 | arm64_core_reg!(pc)
| ------------------- in this macro invocation
|
= note: this warning originates in the macro `offset__of` (in Nightly builds, run with -Z macro-backtrace for more info)
Fix the UB with an implementation based on memoffset::offset_of and
addr_of_mut! instead.
BUG=none
TEST=`emerge-kukui crosvm` no longer complains about UB
Change-Id: I0ab55dc7527c3a4acffe02ee587742dbddd45a0f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3270099
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Use the anyhow crate to provide ad-hoc errors with context. This removes
the large, manually-updated enum, which we never use programmatically
anyway (error messages are printed in human-readable form and otherwise
not matched against).
BUG=b:190433480
TEST=cargo build
TEST=./test_all
Change-Id: Ia7b90b33774d4031054b346d650861d3105044ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3105436
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
This change contains the results of running
./tools/contib/cargo_refactor.py
This will break the next uprev, and needs to be synchronizized
with the corresponding ebuild changes in https://crrev.com/c/3248925
BUG=b:195126527
TEST=./tools/run_tests
Change-Id: Ied15a1841887bb8f59fba65b912b81acf69beb73
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3248129
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
At present the Guest generates its own CPU topology. To mitigate
cross-hyperthread speculative execution side channel attacks, allow
Guest to use mirror CPU topology of Host is needed for future scheduling
optimization.
Add a config option "--host-cpu-topology" to ask the vCPU number to be
identical to physical CPUs, and make the vCPU has the same APIC ID in
MADT and CPUID as the corresponding physical CPU. The same APIC ID can
ensure the same topology.
"--host-cpu-topology" requires vCPU number must equal to pCPU number,
and it has the default vCPU number setting, which equals to pCPU number.
"--host-cpu-topology" also defaultly sets CPU affinity for each vCPU to
the pCPU which has the same processor ID, like 1=1:2=2:3=3:4=4, so that
the vCPU and its corresponding pCPU will have the same processor ID and
the same APIC ID. User can't set CPU affinity if "--host-cpu-topology"
was set.
BUG=b:197875305
TEST=Set "--host-cpu-topology" option and check Guest's /proc/cpuinfo,
lscpu, CPUID for different vCPU
Change-Id: Ibc4eb10649e89f43b81bde6d46d6e0e6c7234324
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3217035
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
With vfio pci device hotplug, bus->devices will be inserted and removed at
runtime in different vcpu threads, so mutex should be used to protect it.
Both each vcpu thread and pci_root share mmio_bus and io_bus, so use Arc
for mmio_bus and io_bus. But pci_root is inserted into io_bus for pci cfg io,
in order to resolve reference loop and memory leak, weak is used for
pci_root.mmio_bus and pci_root.io_bus.
BUG=b:174705596
TEST=boot a vm and check its function
Change-Id: I7b3e63db76a90bc3873619b4d80a66db741ce78f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3184724
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Platform device is another type of device which might be assigned
directly to VM by using the same IOMMU DMA isolation technique.
In contrary to PCI, platform device has no config space which
describes device resources and makes it self-contained and
self-discoverable. Therefore, platform device resources are described in
FW and host is the one who enumerates/probes devices by parsing DT/ACPI.
We have ioctl i/f which allows to expose all that info to VMM.
Add platform bus specific calls to interact with host properly and
plug in to aarch64 bus creation code.
Note, for now all IRQs are abstracted to wired line (SPI in ARM GIC world)
which means guest wont see MSI-X for platform devices.
BUG=b:185504618
TEST=trogdor64-manatee SDHCI and GENIQUP device passthrough boots/works
Change-Id: Id0e9efde3586af77ed1d0b8bf79ca485906afb83
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961216
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Commit-Queue: Micah Morton <mortonm@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
DT platform bus abstraction requires its own MMIO address range.
Let it allocate from well defined address range.
BUG=b:185504618
TEST=trogdor64-manatee SDHCI and GENIQUP device passthrough boots/works
Change-Id: I357e909433a565968a7f081c727a3b1e420e7729
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961212
Commit-Queue: Micah Morton <mortonm@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Before we call build_vm we are creating devices and there is no reason
to assume those have to be PCI only. In preparation for VFIO platform
device support, add super trait which allows to pass generic device
structure around and still be able get back to our original type.
BUG=b:185504618
TEST=manatee PCI device passthrough boots/works
Change-Id: I500f44af430f5f06299f20fc4ca17ca008a7e0c5
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2961210
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Rather than duplicate the calculation, resuse the helper function that
calculates the entry address. This means there's just one place to make
changes and everything will be kept in sync.
BUG=none
TEST=presubmit
Change-Id: I2fd31dbaf2479ad0ce9d05c7341323b695268fa4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3111366
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Andrew Scull <ascull@google.com>
Add necessary kernel cmdlines for aarch64.
Adjust PCI address to make room for ramoops on aarch64.
Move the code from x86_64 to common places.
BUG=b:153934386
TEST=vm_pstore_dump
Change-Id: I8f92a7fd04a49afd7e8be9e7cf1901ef70b88d65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3103131
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Kansho Nishida <kansho@chromium.org>
Commit-Queue: Ryo Hashimoto <hashimoto@chromium.org>
Device implement HotPlugBus trait could notify hotplug event into
guest, and such device should be added into RunnableLinuxVm, so it
could be used at device plug in and plug out.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: I9497f61312582483090ff708d0f37b97d7303811
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954673
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
When a vfio pci device is added through hotplug in, it should be configured
at runtime and added into pci_root->devices tree, so pci_root is added
into linux.
BUG=b:185084350
TEST=Boot a guest with and without passthrough device
Change-Id: Ibcb5f4a849134f64fbceeac645bebd80d6ca72d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2954672
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Move the definitions of SerialHardware, SerialParameters and SerialType
to the devices crate so that they'll be available for code in the
devices crate as well.
BUG=b:195495971
TEST=cargo test
Change-Id: Ieb711bdb18a8afdb28cac262a3355739604d4607
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3096439
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Protected VMs require all virtio data to be bounced through a memory
window shared between the host and the guest. Although this can be
achieved by forcing the guest to use swiotlb bouncing for all DMA
transfers, the recent introduction of "Restricted DMA" in Linux allows
these buffers to be sized and allocated on a per-device basis.
Remove the 'swiotlb=force' option when '--protected-vm' is set in favour
of describing a reserved memory region to be used as the swiotlb buffer
for all virtio-pci devices, adjustable via the new '--swiotlb' option.
BUG=b:190593703
TEST=cargo test on x86 and arm64 machines
Cc: David Brazdil <dbrazdil@google.com>
Cc: Claire Chang <tientzu@chromium.org>
Cc: Quentin Perret <qperret@google.com>
Cc: Andrew Walbran <qwandor@google.com>
Cc: Marc Zyngier <mzyngier@google.com>
Change-Id: I2d48a7c77740e7f3ad996ad33592f0acd53b7144
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3064198
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Will Deacon <willdeacon@google.com>
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
This flag is intended to be used to delay making a VM's RT VCPUs
RT until "make_rt" is called, in order to avoid boot time
regressions with RT.
BUG=b:142777321
TEST="grep policy /proc/<pid of rt vcpu>/sched" to make sure RT vcpu
isn't RT until "make_rt".
Change-Id: I1b9132e11f0acc626434c60cecc2f4afe350961a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2703224
Auto-Submit: Suleiman Souhlal <suleiman@chromium.org>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Suleiman Souhlal <suleiman@chromium.org>
The devices to be notified on resume are unrelated to the functionality
of Bus, which is looking up devices in an address space. Additionally,
each Bus instance had its own list of devices to notify, although in
practice, only the one in the I/O bus was used.
Move the resume_notify_devices list into RunnableLinuxVm instead.
BUG=None
TEST=Boot Crostini on x86 and arm
Change-Id: I72c629c6d6589c4a9350831c8a076c5c0c9f9aeb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3043489
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
In VT-d, the IOMMU hardware can translate guest physical address that
is no more than MGAW (Maximum Guest Address Width) which is reported
from the VT-d Capability register.
We pass this information to the guest IOMMU front driver so that it
can allocate appropriate IOVA.
VT-d indicates that "implementations must support MGAW at least equal
to the physical addressability (host address width) of the platform".
Thus we take the Physical Address Bits that is reported by
CPUID.80000008H as the minimum MGAW.
BUG=b:181736020
TEST=--vfio=/sys/bus/pci/devices/0000:00:14.0,iommu=on
Change-Id: I26a421ea2e7dd893d413d63ab313721cfdf0b5c1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2757278
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: David Stevens <stevensd@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: David Stevens <stevensd@chromium.org>
Move the call to enable_protected_vm past the PVTIME memory region
allocation introduced by 895c90c5f2 ("aarch64: Implement
ARM_VCPU_PVTIME for "stolen time" accounting"). As such allocation is
prohibited once protected VM mode has been enabled (Kernel returns
EPERM), which currently results in crosvm failing when started with
--protected-vm.
BUG=b:193231584
TEST=crosvm --protected-vm on a kernel with KVM_CAP_ARM_PROTECTED_VM
Change-Id: I2a97d3ff64ed59dd6679e51951c79e27bf290d5e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3021126
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
ARM supports paravirtual clocks or "stolen time" accounting by
allocating a page of memory in the guest memory map for a pvtime
structure and then sharing that address with the guest and updating it
in the host to tell the guest about how much time has been stolen from
the guest because the guest hasn't been running. Read all about it
here[1]. Add support to crosvm to allocate this page (for now a 64K size
chunk of memory that all VCPUs share access to) and then set the address
of the page in each VCPU when starting up.
[1] https://www.kernel.org/doc/html/latest/virt/kvm/arm/pvtime.html#stolen-time
BUG=chromium:1130828, b:169094241
TEST=emerge-trogdor crosvm && cros deploy $DUT crosvm && \
tast run $DUT crostini.Basic.buster_stable;
dmesg | grep pv # in the guest shows "steal time"
Change-Id: Ie3497bb22fb0e38eeff8ebac14b4213824bb6ca6
Disallow-Recycled-Builds: test-failures
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2871394
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
The --cpu-cluster option can be used to report a physical grouping of
CPUs in the device tree as a "cpu-map" node:
https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/topology.txt
Each instance of the --cpu-cluster option specifies a new group
consisting of a list of CPUs, and it may be repeated to add multiple
groups.
The --cpu-capacity option can be used to specify the relative
performance of CPUs so that the guest kernel's scheduler can make better
decisions on systems with heterogeneous cores (e.g. big.LITTLE).
--cpu-capacity units are left up to each architecture; for devicetree
systems, capacity is used to fill the cpu capacity-dmips-mhz (Dhrystone
benchmark MIPS per MHz) field in each cpu node:
https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/cpu-capacity.txt
For example, on a trogdor board, there are 6 little cores (0-5) with a
capacity of 452, and 2 big cores (6-7) with a capacity of 1024, which
results in a crosvm command line argument of:
--cpu-capacity 0-452,1=452,2=452,3=452,4=452,5=452,6=1024,7=1024
Currently, these options only have an effect on devicetree platforms and
are ignored elsewhere; they may be expanded in the future to fill in the
equivalent ACPI tables if systems with heterogeneous CPUs are used
there.
BUG=b:182198842
TEST=Start crosvm on kevin with --cpu-cluster options
TEST=crosvm run --cpu-cluster 0,1,2,3 --cpu-cluster 4,5
Change-Id: I59c466549ccd908f8eea1da0651d82716bc82972
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2762298
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
This will be used to dynamically add and remove bus ranges when the PCI
command register is updated to enable/disable memory and IO decode.
BUG=b:174705596
TEST=cargo test -p devices
Change-Id: I6bb175e0628bf598d049562700e2f55a2a62df59
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2689081
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Zach Reizner <zachr@chromium.org>
These parameters multiplied the number of type arguments to build_vm
unnecessarily and complicated the thread of execution in the programmers
head. Closures also complicate the borrow rules, making things much
harder to change.
This change uses the results of the closures (e.g. PCI devices, IRQ
chips) as parameters instead. The rest of this change follows naturally
from pulling on that thread until tests pass.
As a result of the removal of several type arguments, the code size was
reduced by ~100KiB on a 5MiB build.
BUG=b:185170486
TEST=./test_all
Change-Id: I6bcc5eb1b1f3031d4328bb4a81ddef618d04767b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2829136
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Zach Reizner <zachr@chromium.org>
Reviewed-by: Tomasz Jeznach <tjeznach@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
A protected VM will have the PC set to the start of the firmware at boot
by EL2. Pass the address of the next stage to the firmware in x1.
BUG=b:175729255
TEST=cargo test
Change-Id: I8d5a2aae4e2790914e12358f52511c8f18b3d769
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2843605
Tested-by: kokoro <noreply+kokoro@google.com>
Auto-Submit: Andrew Scull <ascull@google.com>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
This requires exporting the memory layout from the arch crates, but it
does simplify the bloated build_vm interface a bit. It also will allow
for more fine-grained control the backing memory of GuestMemory.
TEST=test_all
BUG=b:183988204
Change-Id: Ie76755198d2fdc2a41bd538650939d6550686b88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2809434
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Chirantan Ekbote <chirantan@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Zach Reizner <zachr@chromium.org>
This removes some unsafe code, improving the interface so that it cannot
be misused (e.g. previously, different Vec<u8> instances could be passed
to fdt functions that did not validate the contents).
The new implementation also adds some extra error checking to catch
invalid string values in all API entry points that accept strings, as
well as out-of-order node nesting that would result in DTB data that did
not conform to the spec.
BUG=b:175729255
TEST=cargo test -p arch
TEST=Boot Crostini on kevin (arm)
TEST=diff old and new dts from `dtc -I fs -O dts /proc/device-tree`
Change-Id: I567d562ed1b447aa0d282b68c71758edea13ffc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2713569
Reviewed-by: Zach Reizner <zachr@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>