In ACPI world multiple GPEs (HW wires signaling arbitrary event)
can be associated with single SCI. Any pending GPE causes SCI
to be fired and appropriate GPE handler dispatched. In order
to pass-through GPE to the guest and take virtualization actions,
host kernel provides mechanism to bind physical GPE with SCI eventfd and
forward that information the the event listener (crosvm or KVM most likely).
Add userspace counterpart to host kernel GPE forwarding module
implemented in CL:3488959.
BUG=b:205072342
TEST=see CL:3492224
Change-Id: I1179baa78339bdd78f3fabf0139eb6f61f90eb2b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3439889
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to allow handling physical GPE in the guest, implement GPE
status & enable register bits read/write passthrough to/from physical
registers for selected GPEs (while for the rest of GPEs the registers
remain purely emulated).
We use Linux kernel's ACPI sysfs interface for accessing physical
GPE regs. Note that in particular for enabling/disabling GPEs we use
"mask"/"unmask" interfaces instead of "enable"/"disable", since we
want to do raw enable/disable, bypassing ACPICA's reference counting.
We only do "enable" when it is enabled for the first time, to ensure
that the ref count for the given GPE is > 0.
This of course assumes that the given GPE is enabled/disabled
exclusively by the guest, never by the host.
Thanks to Peter Fang for the idea to use mask/unmask.
BUG=b:205072342
TEST=see CL:3492224
Change-Id: I20c08d371710f89b359ac5e8677f22165811eb84
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492222
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmytro Maluka <dmy@semihalf.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to allow handling physical GPE in the guest, implement
physical SCI interrupts forwarding from the host to the guest.
It uses an eventfd based mechanism similar to how we normaly do
forwarding of other level-triggered interrupts. The difference is that
SCI trigger events from kernel are not injected directly to irqchip.
In order to support injecting both physical and virtual SCI interrupts
(so that some GPEs can be handled as physical while other GPEs can be
emulated), SCI trigger event is intercepted by ACPIPMResource which
injects it to irqchip via another eventfd - the same eventfd which is
used for injecting virtual SCI interrupts.
Similarly, resample event for physical forwarded SCI is received
via the same eventfd as for virtual SCI, then forwarded back to kernel.
BUG=b:205072342
TEST=see CL:3492224
Change-Id: I480a3000d69305aabc777e193d3453c476d2dbbd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492221
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmytro Maluka <dmy@semihalf.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to ensure proper emulation of PM1 and GPE events for the guest
and prevent lost events, upon receiving SCI resample event we need to
trigger SCI interrupt again if the status of some of the virtual PM1 or
GPE events is still not cleared, i.e. if:
a. the guest has received the last PM1 or GPE event but hasn't cleared
it for some reason.
or
b. the guest hasn't received the last PM1 or GPE event because it was
processing the previous SCI (i.e. SCI was masked in the guest).
BUG=b:205072342
TEST=inject GPE or power button event from command line
and inspect /sys/firmware/acpi/interrupts/
Change-Id: Iff9f9812328823b1876721fbb4be9d0e937f2737
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492219
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In preparation for implementing SCI resample handling which will work
in a separate worker thread, implement Pm1Resource and GpeResource
to access virtual PM1 and GPE regs concurrently using Arc<Mutex<...>>.
BUG=b:205072342
TEST=inject GPE or power button event from command line
and inspect /sys/firmware/acpi/interrupts/
Change-Id: Icf7e845cf21fd9d1edcb91db26632e202b7b8434
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492218
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to listen on a specific netlink generic multicast group for a given
family (e.g. "acpi_mc_group" multicast group registered for "acpi_event" family),
we first need to get its group id registered by the kernel.
To achieve above, this commit implements two functionalities:
1) family name query (family_name_query), which prepares proper netlink
message, which is next send to netlink generic controller to query
kernel about a given family name. (e.g. it can be used to query about
"acpi_event" family)
2) parse the netlink generic answer and get group id registered for a
given generic netlink multicast group name (get_multicast_group_id)
(e.g. it can be used to get multicast group id for "acpi_mc_group").
BUG=b:197247746, b:205072342
TEST=Use introduced functionality to query about "acpi_event" generic
netlink family and get group id for "acpi_mc_group" group. Additionally
test the same after hacking the kernel and registering two other multicast
groups for acpi_event, so "acpi_mc_group" got a different group id. In
both cases successfully listen on "acpi_mc_group".
Change-Id: Ia7681fae2200ff5baebbad3742c9dd97ac59cae5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3515924
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
When pci_low_mmio allocates non-prefetchable bridge window for virtual
pcie root ports on brya-manatee, out of space error happens on one
virtual pcie root port.
Currently 756MB mmio is reaserved for pci low mmio and nearly 650MB could
be allocated, but byra has three pcie root ports, each pcie root port
reserve 194MB non-prefetchable bridge, so CrOS in brya-manatee needs at
least 194x3=582MB pci low mmio, consider bar alignment, 756MB isn't
enough for brya-manatee and the above error happen, so this commit
increate it to 1G.
BUG=b:185084350
TEST=boot brya-manatee and check bridge window allocation on each
virtual pcie root port.
Change-Id: I837f7dad459f624437ce6334719dfe337dea1d75
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3535683
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
The windows tests cannot be enabled because of dependency on base.
Some minor cosmetic changes.
Bug: b:213152499
Test: Build and presubmit
Change-Id: If11b9fa0784f1f37a5106e32b328306a4a2c0cf6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3533582
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
There is currently no use case for the PM timer in the guest and TMR_STS
is not implemented in vPM1, so disable it altogether for now.
BUG=b:199383670
TEST=boot manatee
Change-Id: I61b214a466becef2d923fdbfe450c31b08b70037
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3528533
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
In order to use netlink generic socket together with WaitContext,
AsRawDescriptor needs to be implemented.
BUG=b:197247746, b:205072342
TEST=Use NetlinkGenericSocket with WaitContext and successfully use it
for threads
Change-Id: I99c9d508c86395f104a7a2f17a1726b753c9698b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3528638
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
KVM irqchip treats differently edge vs level triggered IRQ.
By registering SCI without resample event, we might see unexpected
misbehavior. Since SCI is level-triggered IRQ pass corresponding
resample event even though we don't utilize it right now.
Also store the new event as part of ACPIPMResource for future usage.
BUG=b:205072342
TEST=inject GPE and inspect /sys/firmware/acpi/interrupts/
Change-Id: Ib27f98bbef56ea4ca18da5bf4428bf45bf115882
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3439888
Reviewed-by: Micah Morton <mortonm@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Grzegorz Jaszczyk <jaszczyk@google.com>
Had to add some exceptions here because of some mismatches between
the structrure of files vs modules.
BUG=b:22320646
TEST=python tools/contrib/refactor_use_references
Change-Id: Ia9da533bd8c89871893adfa461e47e4e2fe600d9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3530119
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
The max_read and max_write in worker::start_message_loop are confusing.
The max_read defines the amount of data the filesystem should be fed /
read from /def/fuse, during the write(2) operation to the filesystem.
The meaning is oppposite to the mount option max_read, which is for the
actual read operation.
This change adds API doc, fix the new API, and renames variables to
disambiguate them. With the new API, the meaning should be more
intuitive and consistent.
Bug: 220386264
Test: use in Android
Change-Id: Ifa77cb3c291626fdbb8a28f36cf2a44dd859f70f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3526527
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Victor Hsieh <victorhsieh@chromium.org>
An internal namespace is created as a signal to discourage the use of
the new public API directly.
BUG=b:220386264
TEST=Use the API. See multiple threads in the FUSE process
Cq-Depend: chromium:3514800
Change-Id: I8b9d6321c5dffedb27c6c1ddc6d6b0e125d3cf18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3514618
Auto-Submit: Victor Hsieh <victorhsieh@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Victor Hsieh <victorhsieh@chromium.org>
This will be used by both the ffmpeg and the libva decoder backends, so
merge it ahead-of-time so both backends can be developped independently
from main.
BUG=b:169295147
BUG=b:214478588
TEST=cargo build --features "video-decoder,libvda"
TEST=with crrev.com/c/3026355: cargo test --features "video-decoder,ffmpeg" -p devices virtio::video
Change-Id: Ie00be77b8c0c024b89bff5a5458e62b175fa70ac
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3482936
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
Do not warn if the `image_path` parameter is unused, as it is only used
if the composite-disk feature is enabled.
BUG=b:221887571
TEST=cargo build
Change-Id: I91f747152c0e5f4d75f7522a33d35f91890c6df6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3531731
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
Linux expects that PCI bars lie within a compatible bridge window, which
are typically specified via _CRS objects in ACPI. This change adds an
option to restrict mmio allocations (i.e. PCI bars) to within a
specified set of ranges. The specified set of ranges is intersected with
the default mmio allocation ranges generated by the crosvm arch code to
produce the final mmio allocation ranges.
This change is required to remove pci=nocrs from the CrOS guest's kernel
command line flags. Removing that flag is a prerequisite for enabling
virtio-iommu, since without the configuration information from ACPI, the
kernel reserves all IOVAs in iova_reserve_pci_windows.
BUG=b:181736020
TEST=boot manatee w/o pci=nocrs kernel cmdline flag
TEST=tast run trogdor|hatch arc.Boot.vm
Change-Id: I0a096420c5d5ef56dd76021951968e264ce40f42
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3499900
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Add a method to SystemAllocator that returns a vector of all pools and
use it to generate the PCI ranges in build_vm. This also fixes a bug
where x86 used the size as the end address for the high_mmio region.
BUG=b:181736020
TEST=tast run trogdor|hatch arc.Boot.vm
Change-Id: Id4a300ec61c15bc08fb069b80428b22461ca935b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516668
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Remove the ramoops region from high_mmio when constructing the system
allocator. This means the aarch64 code no longer needs to manually
adjust high_mmio when determining the pci regions.
BUG=b:181736020
TEST=Check arcvm pstore still works
Change-Id: I81ca398a1984f0efb30c0a4d4b620bd50fe9df85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516667
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Use RangeInclusive when constructing an AddressAllocator. A followup
change will add an iterator constructor, so using RangeInclusive makes
that API cleaner.
BUG=b:181736020
TEST=cargo test
Change-Id: I59c28b9cbd06c86482c0c57704fc2753a7886ac6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516666
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Have the arch code return the SystemAllocatorConfig instead of a
SystemAllocator. This will be used to allow the core code to apply
additional restrictions on top of the arch code's restrictions.
BUG=b:181736020
TEST=compiles
Change-Id: I4d9ca277f039586e664648492c8744967dcd2ee5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516665
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Windows vmm_vhost differs from linux vmm_vhost mostly on the structures
that it depends on. For example windows uses Tube for linux'
UnixStream.
The patch aliases some of these types in a platform specific file. Rest
of the platform independent code depends on those aliases.
Bug: b:213151429
Test: presubmit, manually run cargo test on windows.
Upstream-Crate: third_party/vmm_vhost
Change-Id: I3f98fbec1ffdd8914dc5befddce3a8483a5fd94f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3496082
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
This is a prerequisite for sys_util* to move into the base
crate. The crate should never have been in common in the
first place since it is not shared.
BUG=b:223206469
TEST=python tools/contrib/cargo_refactor.py
Change-Id: I60115e0418c6980d7bf7ff624a3cc0a24e71a57d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3530502
Reviewed-by: Anton Romanov <romanton@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
This will be run on crates that are to be moved into the
base crate.
The script is run in the follow up CL.
Note: This is a one-off script. It just has to work one,
not for the general case.
BUG=b:223206469
TEST=python tools/contrib/refactor_use_references.py
Change-Id: Ic92109572649c9130784b986c67fddc8f9b838d6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3530497
Reviewed-by: Anton Romanov <romanton@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This allows us to move the composite disks and partitions around instead
of needing to know the paths beforehand.
BUG=b:221887571
TEST=Manual test with composite disk created via mk_payload.
Change-Id: Ifab86bc62509e58cc95b0f8420bffc554d60f380
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3499408
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Richard Fung <richardfung@google.com>
In order to avoid deadlocks (when a Vcpu thread has locked the ioapic and
the ioapic sends a AddMsiRoute signal to the main thread which itself may
be busy trying to call service_irq) KvmSplitIrqChip defers IRQs by using
vector of delayed IRQs and queuing it up for the next main thread loop
spin.
The problem is that next loop spin will ever happen if there will be
any *unrelated* trigger event to be serviced which means IRQ reinjection
may take really long time, at least longer than some devices may assume
before timeout.
Instead of relaying on non-deterministic mechanism, make sure the next
trigger event for main thread is around the corner by:
- adding a new event - strictly related to processing delayed IRQs
- adding a new token type in main thread and correlate the new event
occurrence with process_delayed_irq_events() irqchip call
- writing to the new event as soon as new IRQ is added to the delayed
vector
This makes sure that delayed IRQs (if present) are always on main loop's
TODO list.
BUG=b:184871003
TEST=boot guest using crosvm --split-irqchip flag and check if IOAPIC
related IRQs are working
Change-Id: I89e731f19a7fa5215cd4a57fa5c94a89a7c9161a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3494286
Reviewed-by: Colin Downs-Razouk <colindr@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Stop using Tube::try_clone() as we want to remove this method.
This requires a change in how the GPU device tube is set. Cloning the
control tube on the VMM side allowed us to pass only one tube to the GPU
device, which received the first message asking for BAR information and
then immediately recycled its tube to send VmMemoryRequests.
Without cloning, we to create two full Tubes and pass the VmMemory tube
as part of the first message to the device. This is a bit more involved
but also safer.
BUG=b:222379833
BUG=b:221484449
TEST=`cargo run device gpu` replies to the initial message and receives
the tube from the VMM process.
Change-Id: I5c85c7c54ab7be0eba322d1884da7076398c4095
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3499911
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
Update links still pointing to master, update to point to HEAD
BUG=b:224796805
TEST=navigate to updated link and/or N/A
Change-Id: I1777c32e4e455cfeb95cf82c944d1adbca350767
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3525743
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
ScopedEvent's implementation was the exact same in 3 different places.
Bug: b:215618500
Bug: b:223840386
Test: ran emulator
Change-Id: I835ef9c523936dd651652f344f4857515afb8bdd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3523746
Reviewed-by: Richard Zhang <rizhang@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
The API allows audio_streams to be used by crosvm and libcras while
their implementations of cros_async may diverge in the future.
BUG=b:223624364
TEST=./tools/presubmit and emerge tests
Cq-Depend: chromium:3519246
Change-Id: I08b6bf12e02c211275c11f1886f23f71217e40b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3518657
Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
This is as is upstream of win_sys_util except following changes
1. Ignores flaky tests in syslog.rs and priority.rs - a todo is added.
2. Ignore this crate of unix tests/clippy.
3. Fix few doctest issues on windows.
The files are pulled from downstream repo at
Commit-Id: 53e8dfa6ec26de3f2ea2b637a5bfef96703214f3
Downstream-Change-Id: I5dd9e70566330b469fe245fc71451fb4dcd7e1ba
The cl should not affect unix binaries.
Bug: b:223840386
Test: Tested on windows by running
1. cargo test --all-features
2. cargo clippy
3. cargo fmt
Change-Id: I454f2e03b6269f374d107b83c8223ce98b9e29bf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3514125
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
Since this is a windows specific crate, we will skip building and
testing the crate on unix.
The files are pulled from downstream repo at
Commit-Id: 53e8dfa6ec26de3f2ea2b637a5bfef96703214f3
Downstream-Change-Id: I5dd9e70566330b469fe245fc71451fb4dcd7e1ba
The cl should not affect unix binaries.
Bug: b:213149154
Test: cargo test on windows
Change-Id: I1be598c119891a6c45b4f397463bcb0a8d89b65c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3515653
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
Now that we can handle file-backed mappings that overlap with guest
memory, we can remove the workarounds for coreboot regions when
compiling with --features=direct.
BUG=b:188011323
TEST=cargo test -p x86_64 --features=direct
TEST=Boot volteer-manatee and brya-manatee
Change-Id: I9ac2a25e1896c5ec61bd302882d4c99d8b36b0dd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3498210
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
In order to emulate IOAPIC pins and still be able to inject IRQs
via KVM eventfd, SplitIrqChip driver allocates input and output eventfd
for each pin:
- the input eventfd listens for incoming events (e.g. physical IRQ
occurrence or userspace emulated IRQ). This gives chance to to emulate
pin states before handing over to KVM
- the output eventfd inject the actual virtual IRQ in KVM standard manner
Once the guest tries to configure a new IOAPIC pin, the output event GSI
number is allocated dynamically. So there is no chance to know GSI number
upfront to expose it via e.g. ACPI. This is the blocker for direct IRQ
forwarding where 1:1 mapping is inherent feature.
Allocate output eventfd vector and fill in with 1:1 GSI mapping upfront
only for direct configuration feature. Any potential guest IOAPIC pin
configuration request will used pre-allocated GSI number so that guest
will see proper IRQ number. No functional changes for the rest of the cases.
BUG=b:184871003
TEST=boot guest using crosvm --split-irqchip flag and check if IOAPIC
related IRQs are working
Change-Id: Ie1578a831ff21489e4e7dd9c7ec3f5384b4af16a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3494285
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Steven Richman <srichman@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In general irqchip finalizes setup and finalize_devices() should be called
once all devices have registered irq events and been added to the io_bus
and mmio_bus.
Split irqchip finilize_device() implementation in particular,
hands over requested irq events to IOAPIC in order to emulate pin state
and do proper forwarding when needed.
Move direct-irq registration before irqchip finalizes so that direct-irq
is taken into account. Note that direct-irq does work with kernel irqchip
implementation because its finalize_devices() is empty.
BUG=b:184871003
TEST=boot guest using crosvm --split-irqchip flag and check if IOAPIC
related IRQs are working
Change-Id: I78dbace08eee4a5bc91695fd8b8d41a84e58cde9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3494284
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Steven Richman <srichman@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
fuse::worker::start_message_loop is not a scalable API, so deprecate it.
This paves the way to support multiple threads.
BUG=b:220386264
TEST=Modify a client in Android to use the API
Change-Id: I41e8d5267384311a7b03beb67f7774332863fbf7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3514617
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Victor Hsieh <victorhsieh@chromium.org>
Always advertise support for ACPI reset register, regardless of FADT
forwarding. The current reset register points to the PCI reset register
(CF9), which is always virtualized.
The Linux x86 kernel prioritizes using the ACPI reset register in its
reboot flow.
BUG=b:199383670
TEST=boot Linux kernel and reboot
Change-Id: Ib644e1062eb6e040d16c0c8d7cec2a54a86b3918
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3350495
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
