Xiong Zhang 6d1b2df054 pci-bridge: Set limit smaller than base at initialize ... According to pci bridge spec, the io/mem/prefetch mem limit register must be programmed to a smaller value than the corresponding base register if there is no io/mem/prefetch mem on the secondary side of the brige. When bridge is created, it doesn't have any child device, then no io/mem/prefetch mem on the secondary side of the bridge, so this patch set limit to 0, but base to 0xffff. When a device is attached behind the bridge, kernel will assign resource and set the right value to these base and limit register. BUG=b:199442120 BUG=b:185084350 TEST=crosvm run --bios OVMF.fd TEST=hotplug in/out a pcie device to pcie root port repeatly Change-Id: Id1c2ff1132d59e1aafd548fc17ab5aee2023dd8c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3166883 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>		2021-10-25 22:03:13 +00:00
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src	pci-bridge: Set limit smaller than base at initialize	2021-10-25 22:03:13 +00:00
.build_test_serial
Cargo.toml	crosvm: switch to upstream tempfile crate	2021-10-11 18:35:55 +00:00