Upon receiving acpi event related to ACPI button notification emulate
PM/PWRBTN_STS and trigger SCI.
BUG=None
TEST=After enabling CONFIG_ACPI_BUTTON on hypervisor kernel, check if
power button events are propagated to the guest by reading
/sys/firmware/acpi/interrupts/ff_pwr_btn counter.
Change-Id: Ie52c58d0934fb6657940bdca35dfbc68a8f4f42c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3521728
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Ignore ACPI netlink events for GPEs which are configured as direct
GPEs. Such GPEs are forwarded to the guest directly as physical GPEs
using eventfd based forwarding of physical SCI interrupts (which
ensures that the GPE handling in the guest is synchronized with SCI
interrupt context in the host).
Forwarding via netlink should be used for emulated GPEs only.
With this change, we are still propagating all GPE events received by
the host to the guest. In the future we may need to enhance this logic,
since for some types of GPEs we may not want to inject them to the
guest at all, e.g. for Thunderbolt hotplug GPE we want to receive it
in crosvm and then inject a normal PCI hotplug interrupt instead.
BUG=b:197247746, b:205072342
TEST=Make sure that GPE marked as direct are ignored
Change-Id: Id5b05a99951455f52dcb375289cb10d040e8ff7f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492225
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to listen on acpi_mc_group of acpi_event family there is need
to query kernel about it's group id, which is next used to create ACPI
event related socket. This socket is next used during ACPI PM worker's
wait context build.
Upon receiving ACPI events, dispatch them by device class and in case of
receiving "gpe" one, emulate proper vGPE and inject vSCI to the guest.
BUG=b:197247746, b:205072342
TEST=Receive, parse and use GPE generated by ACPI events. With use of
additional kernel patches make sure that GPE notifications are correctly
received, emulated and vSCI injected to the guest.
Change-Id: I18bdfe18ebb1e5bcfa7277b91ae195a61fac1a3d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3407321
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In ACPI world multiple GPEs (HW wires signaling arbitrary event)
can be associated with single SCI. Any pending GPE causes SCI
to be fired and appropriate GPE handler dispatched. In order
to pass-through GPE to the guest and take virtualization actions,
host kernel provides mechanism to bind physical GPE with SCI eventfd and
forward that information the the event listener (crosvm or KVM most likely).
Add userspace counterpart to host kernel GPE forwarding module
implemented in CL:3488959.
BUG=b:205072342
TEST=see CL:3492224
Change-Id: I1179baa78339bdd78f3fabf0139eb6f61f90eb2b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3439889
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to allow handling physical GPE in the guest, implement GPE
status & enable register bits read/write passthrough to/from physical
registers for selected GPEs (while for the rest of GPEs the registers
remain purely emulated).
We use Linux kernel's ACPI sysfs interface for accessing physical
GPE regs. Note that in particular for enabling/disabling GPEs we use
"mask"/"unmask" interfaces instead of "enable"/"disable", since we
want to do raw enable/disable, bypassing ACPICA's reference counting.
We only do "enable" when it is enabled for the first time, to ensure
that the ref count for the given GPE is > 0.
This of course assumes that the given GPE is enabled/disabled
exclusively by the guest, never by the host.
Thanks to Peter Fang for the idea to use mask/unmask.
BUG=b:205072342
TEST=see CL:3492224
Change-Id: I20c08d371710f89b359ac5e8677f22165811eb84
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492222
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmytro Maluka <dmy@semihalf.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to allow handling physical GPE in the guest, implement
physical SCI interrupts forwarding from the host to the guest.
It uses an eventfd based mechanism similar to how we normaly do
forwarding of other level-triggered interrupts. The difference is that
SCI trigger events from kernel are not injected directly to irqchip.
In order to support injecting both physical and virtual SCI interrupts
(so that some GPEs can be handled as physical while other GPEs can be
emulated), SCI trigger event is intercepted by ACPIPMResource which
injects it to irqchip via another eventfd - the same eventfd which is
used for injecting virtual SCI interrupts.
Similarly, resample event for physical forwarded SCI is received
via the same eventfd as for virtual SCI, then forwarded back to kernel.
BUG=b:205072342
TEST=see CL:3492224
Change-Id: I480a3000d69305aabc777e193d3453c476d2dbbd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492221
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmytro Maluka <dmy@semihalf.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In order to ensure proper emulation of PM1 and GPE events for the guest
and prevent lost events, upon receiving SCI resample event we need to
trigger SCI interrupt again if the status of some of the virtual PM1 or
GPE events is still not cleared, i.e. if:
a. the guest has received the last PM1 or GPE event but hasn't cleared
it for some reason.
or
b. the guest hasn't received the last PM1 or GPE event because it was
processing the previous SCI (i.e. SCI was masked in the guest).
BUG=b:205072342
TEST=inject GPE or power button event from command line
and inspect /sys/firmware/acpi/interrupts/
Change-Id: Iff9f9812328823b1876721fbb4be9d0e937f2737
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492219
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
In preparation for implementing SCI resample handling which will work
in a separate worker thread, implement Pm1Resource and GpeResource
to access virtual PM1 and GPE regs concurrently using Arc<Mutex<...>>.
BUG=b:205072342
TEST=inject GPE or power button event from command line
and inspect /sys/firmware/acpi/interrupts/
Change-Id: Icf7e845cf21fd9d1edcb91db26632e202b7b8434
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3492218
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
KVM irqchip treats differently edge vs level triggered IRQ.
By registering SCI without resample event, we might see unexpected
misbehavior. Since SCI is level-triggered IRQ pass corresponding
resample event even though we don't utilize it right now.
Also store the new event as part of ACPIPMResource for future usage.
BUG=b:205072342
TEST=inject GPE and inspect /sys/firmware/acpi/interrupts/
Change-Id: Ib27f98bbef56ea4ca18da5bf4428bf45bf115882
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3439888
Reviewed-by: Micah Morton <mortonm@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Grzegorz Jaszczyk <jaszczyk@google.com>
This will be used by both the ffmpeg and the libva decoder backends, so
merge it ahead-of-time so both backends can be developped independently
from main.
BUG=b:169295147
BUG=b:214478588
TEST=cargo build --features "video-decoder,libvda"
TEST=with crrev.com/c/3026355: cargo test --features "video-decoder,ffmpeg" -p devices virtio::video
Change-Id: Ie00be77b8c0c024b89bff5a5458e62b175fa70ac
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3482936
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
Linux expects that PCI bars lie within a compatible bridge window, which
are typically specified via _CRS objects in ACPI. This change adds an
option to restrict mmio allocations (i.e. PCI bars) to within a
specified set of ranges. The specified set of ranges is intersected with
the default mmio allocation ranges generated by the crosvm arch code to
produce the final mmio allocation ranges.
This change is required to remove pci=nocrs from the CrOS guest's kernel
command line flags. Removing that flag is a prerequisite for enabling
virtio-iommu, since without the configuration information from ACPI, the
kernel reserves all IOVAs in iova_reserve_pci_windows.
BUG=b:181736020
TEST=boot manatee w/o pci=nocrs kernel cmdline flag
TEST=tast run trogdor|hatch arc.Boot.vm
Change-Id: I0a096420c5d5ef56dd76021951968e264ce40f42
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3499900
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Remove the ramoops region from high_mmio when constructing the system
allocator. This means the aarch64 code no longer needs to manually
adjust high_mmio when determining the pci regions.
BUG=b:181736020
TEST=Check arcvm pstore still works
Change-Id: I81ca398a1984f0efb30c0a4d4b620bd50fe9df85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3516667
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
In order to avoid deadlocks (when a Vcpu thread has locked the ioapic and
the ioapic sends a AddMsiRoute signal to the main thread which itself may
be busy trying to call service_irq) KvmSplitIrqChip defers IRQs by using
vector of delayed IRQs and queuing it up for the next main thread loop
spin.
The problem is that next loop spin will ever happen if there will be
any *unrelated* trigger event to be serviced which means IRQ reinjection
may take really long time, at least longer than some devices may assume
before timeout.
Instead of relaying on non-deterministic mechanism, make sure the next
trigger event for main thread is around the corner by:
- adding a new event - strictly related to processing delayed IRQs
- adding a new token type in main thread and correlate the new event
occurrence with process_delayed_irq_events() irqchip call
- writing to the new event as soon as new IRQ is added to the delayed
vector
This makes sure that delayed IRQs (if present) are always on main loop's
TODO list.
BUG=b:184871003
TEST=boot guest using crosvm --split-irqchip flag and check if IOAPIC
related IRQs are working
Change-Id: I89e731f19a7fa5215cd4a57fa5c94a89a7c9161a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3494286
Reviewed-by: Colin Downs-Razouk <colindr@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Stop using Tube::try_clone() as we want to remove this method.
This requires a change in how the GPU device tube is set. Cloning the
control tube on the VMM side allowed us to pass only one tube to the GPU
device, which received the first message asking for BAR information and
then immediately recycled its tube to send VmMemoryRequests.
Without cloning, we to create two full Tubes and pass the VmMemory tube
as part of the first message to the device. This is a bit more involved
but also safer.
BUG=b:222379833
BUG=b:221484449
TEST=`cargo run device gpu` replies to the initial message and receives
the tube from the VMM process.
Change-Id: I5c85c7c54ab7be0eba322d1884da7076398c4095
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3499911
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
The API allows audio_streams to be used by crosvm and libcras while
their implementations of cros_async may diverge in the future.
BUG=b:223624364
TEST=./tools/presubmit and emerge tests
Cq-Depend: chromium:3519246
Change-Id: I08b6bf12e02c211275c11f1886f23f71217e40b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3518657
Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
In order to emulate IOAPIC pins and still be able to inject IRQs
via KVM eventfd, SplitIrqChip driver allocates input and output eventfd
for each pin:
- the input eventfd listens for incoming events (e.g. physical IRQ
occurrence or userspace emulated IRQ). This gives chance to to emulate
pin states before handing over to KVM
- the output eventfd inject the actual virtual IRQ in KVM standard manner
Once the guest tries to configure a new IOAPIC pin, the output event GSI
number is allocated dynamically. So there is no chance to know GSI number
upfront to expose it via e.g. ACPI. This is the blocker for direct IRQ
forwarding where 1:1 mapping is inherent feature.
Allocate output eventfd vector and fill in with 1:1 GSI mapping upfront
only for direct configuration feature. Any potential guest IOAPIC pin
configuration request will used pre-allocated GSI number so that guest
will see proper IRQ number. No functional changes for the rest of the cases.
BUG=b:184871003
TEST=boot guest using crosvm --split-irqchip flag and check if IOAPIC
related IRQs are working
Change-Id: Ie1578a831ff21489e4e7dd9c7ec3f5384b4af16a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3494285
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Steven Richman <srichman@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
- Add vGPE registers to ACPIPMResource and inject vSCI when a GPE is
enabled and its event is received.
- Add a new interface, gpe_evt(), to trait PmResource.
- Always use vGPE, regardless of FADT forwarding.
- Always advertise support for 256 GPEs [1] to reduce code complexity.
[1] "Up to 256 GPEx_STS bits and matching GPEx_EN bits can be
implemented." 5.6.1, ACPI Spec Version 6.4
BUG=b:199383670
TEST=boot Linux kernel and inspect /sys/firmware/acpi/interrupts/
Change-Id: I97687326e9313c26b84dfacade5c8741719e7841
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3350493
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
- Add a new trait, PmResource, for PM-related public interfaces.
- Use SCI_INT in FADT as vSCI if FADT is forwarded.
- Inject vSCI if ACPI fixed power button is enabled and a power button
event is received.
- Disable MPTable generation if FADT is forwarded [1].
[1] MPTable generation in mptable.rs makes certain assumptions about
SCI which is incompatible with FADT forwarding. MADT takes
precedence over MPTable in the Linux kernel so hopefully things
should work correctly.
BUG=b:199383670
TEST=boot Linux kernel and shut down
Change-Id: Icc93c3e7492e44b3a5badc5e75373c472c9b9791
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3350491
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
- Refactor read() and write() for ACPIPMResource to protect against PIO
accesses across PM1 register boundaries, and properly support byte
accesses.
- If compiled with the feature "direct", all writes to SLP_TYP are
interpreted as S5 since _Sx is platform-specific.
- Remove Sleep Control and Status Registers since they are only used on
HW-Reduced ACPI systems.
BUG=b:199383670
TEST=boot Linux kernel and shut down
Change-Id: Iaf9fdf5a161eb6f5618235c3a66f8817258ce289
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3350489
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
As a step toward creating a well-defined base API distinct from
sys_util, remove the wildcard `pub use sys_util::*` and individuall
export just the types, functions, and macros that are intended to be a
part of the public base API.
The only functional change is that the net namespace is flattened into
the top-level base namespace, since it inconsistent with the rest of the
API. (sys_util is not affected and still exports mod net, but base does
not.)
BUG=None
TEST=tools/presubmit
TEST=emerge-hatch crosvm
TEST=emerge-trogdor crosvm
Change-Id: I4028d3489cb3816ec9b8d609b3957db8825eb63d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3500062
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This change fixes the Worker run function infinitely looping when the
sibling disconnects.
BUG=b:194136484
TEST=Test with sibling VM with Vhost master connecting to a device VM.
Change-Id: I7bce45dd50919d5aead6749932d33036c263f322
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3463214
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Abhishek Bhardwaj <abhishekbh@chromium.org>
Auto-Submit: Abhishek Bhardwaj <abhishekbh@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Add error checking so invalid user input does not get silently ignored
and converted into bogus addresses.
Also add a PciAddress::new() function that accepts numeric values and
checks their ranges as a helper for the string parsing function as well
as for general use in other cases.
BUG=None
TEST=cargo test -p devices pci_address
Change-Id: I1131716bfd99e1819e7630021048482c2397b137
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3475440
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Some changes made it through without clippy testing. Fixing these
now.
BUG=None
TEST=./tools/clippy
Change-Id: If369354042691181d5a251e5707b85672757330b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3508311
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
PCI virtual configuration space is a set of virtual registers similar to
PCI configuration space, but for the guest to configure the hypervisor.
One use case is to facilitate ACPI forwarding at API level.
BUG=b:194390621
TEST=builds
Change-Id: I7902d8f589d19426c8b81629722abbf5c68a905a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3344575
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Victor Ding <victording@chromium.org>
Auto-Submit: Victor Ding <victording@chromium.org>
This change fixes a bug in the VVU proxy device where the main thread
would block until a sibling connected to it. This may disrupt the device
from writing and reading bars from it as those operations happen on the
main thread. Instead, the socket accept logic is now moved to the
beginning of the worker thread and the main thread is unblocked.
BUG=b:194136484
TEST=Run device VM without --disable-sandbox.
Change-Id: I4e3344df20a80316316f2b586c52c8c1a88cc36d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3457900
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Abhishek Bhardwaj <abhishekbh@chromium.org>
Auto-Submit: Abhishek Bhardwaj <abhishekbh@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
When a vfio pci device is hot-plugged in, its vfio container should be
passed to the virtio-iommu worker for later dynamic mapping/unmapping
requests.
BUG=b:185084350
TEST=Boot a guest, hotplug in and out a vfio-pci
device repeatedly
Change-Id: Ia2a9c9ef4a3ee6399d90aa17c6656acb52647663
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3476650
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Virtio-iommu device can generate viot using pci ranges. After adding a
vfio device, guest can attach this device to virtio-iommu.
BUG=b:185084350
TEST=Boot a guest with vfio device and 'iommu=viommu', another PCI range
node is generated in guest viot.
Change-Id: I9204d8bd341b6e544a62923164d5c8ce46fdd8bf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3476649
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
A tube channel is needed for the communication between main process and
virtio-iommu worker thread, e.g. passing a vfio container file
descriptor of a hot-pluggable device to the virtio-iommu backend which
is in charge of the mapping/unmapping for the endpoint.
BUG=b:185084350
TEST=Boot a guest with no error
Change-Id: Ib5061e795227040ca400bc9a92df84a27cd26438
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3301703
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
For nonroot vfio-pci device, its prefetchable bars will be allocated
in continuous region, its nonprefetchable bars will be allocated in
another continuous region. Without descending the bar's size, this
allocation waste some mmio.
For example, a vfio-pci device has two non prefetchable bars:
bar0's size is 1M, bar2's size is 8M.
without descending [bar0, bar2], it will allocate 16M mmio, 0~8M
for Bar0, 8~16M for Bar2, although bar0 need 1M only, it occupy 8M
to satisfy bar2's 8M alignment requirement.
With descending [bar2, bar0], it will allocate 9M mmio, 0~8M for
bar2, 8M ~ 9M for bar0.
BUG=b:185084350
TEST=check pcie rp's bridge window in brya-manatee.
Change-Id: I7d93e601f6a46cabe8896aaec065a9dba18c60fa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3500060
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Bridge window's mmio alignment went wrong during our refactor, fix
it in this commit.
BUG=b:185084350
TEST=Check bridge window and pci device mmio setting in CrOS
Change-Id: Ia1a01d1740f943ec7aa36812defe3aabffcfcbde
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3498219
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
On manatee, a vfio-pci could hotplug into an empty pcie rp when
device's host bus number is in pcie rp's bus range.
But on non-manatee, only one virtual pcie rp is created for device
hot plug, it owns one free bus number only, if a vfio-pci device's
host bus number isn't equal to rp owned bus number, this vfio-pci
device couldn't be added into guest through hotplug, so this commit
change is_match() and allow vfio-pci hotplug onto any empty pcie rp.
BUG=b:185084350
TEST=hot plug in/out a vfio-pci device with host bus_number different from
RP's bus range repeatedly in non-manatee.
Change-Id: I9a1059edd9558683e03d85235e0d164b2aa23672
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3498218
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This snuck through as our builders were temporarily not checking
clippy in presubmit. See https://crrev.com/c/3498847
BUG=None
TEST=./tools/clippy
Change-Id: I38ca27728ab4e108539407f5499484c2b881dc47
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3499740
Auto-Submit: Dennis Kempin <denniskempin@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anton Romanov <romanton@google.com>
Commit-Queue: Anton Romanov <romanton@google.com>
Add a flag to the adjust command that allows the command to fail. When
this flag is set, a reply is sent with the balloon size at the end of
adjustment.
The flag also changes the semantics of inflation somewhat. By default,
the balloon driver will indefinitely retry if it fails to allocate pages
during inflation. When the flag is set, the device reacts to puff
failure notifications on the event queue by setting the target num_pages
to the current balloon size, to abort and fail the inflation attempt.
BUG=b:213962590
TEST=manual testing with crrev.com/c/3394436
TEST=check ARCVM balloon still works
Change-Id: Idd606b90550c544ce5bea085f62ac35979679d71
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3394442
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Manatee doesn't support the guest accessing pages in the balloon, since
that would violate the strict its strict memory accounting, so add an
option to skip setting the deflate-on-oom flag.
However, without deflate-on-oom, the Linux driver normally modifies
MemTotal when inflating/deflating the balloon. To avoid that, this
change adds support for the new responsive-device flag proposed in [1].
[1] https://lists.oasis-open.org/archives/virtio-comment/202201/msg00139.html
BUG=b:214864326
TEST=check ARCVM balloon still works
TEST=manual testing with crrev.com/c/3394436
Change-Id: Iabc8352ee30e1b4a240fa3cad8f3b48ba53699a0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3471335
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
Implement event queue that was recently proposed upstream [1]. The puff
failure event will be used in a followup CL. The pressure event is
currently ignored. Figuring out how to use it will be done later.
[1] https://lists.oasis-open.org/archives/virtio-comment/202201/msg00139.html
BUG=b:213962590,b:216214118
TEST=check ARCVM balloon still works
Change-Id: Ie1990505da8eda1358f10f24ca3c2b6196303184
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3471334
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: David Stevens <stevensd@chromium.org>
The compiler was warning about a missing `dyn` on the impl block for
PciDevice, which only contained supports_iommu():
warning: trait objects without an explicit `dyn` are deprecated
We could add the `dyn` to fix it, but it seems cleaner to just move the
definition into the VirtioPciDevice impl's existing supports_iommu
function.
Additionally fix up a few clippy warnings about open-coded instances of
map and unnecessary references.
BUG=None
TEST=cargo build # completes without warnings
TEST=tools/presubmit
Fixes: 055b81b295 ("VIRTIO_F_ACCESS_PLATFORM support in virtio-iommu")
Change-Id: I7c923d1663d4f8c958a3c79619a06ab04e1e00ae
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3498843
Reviewed-by: Anton Romanov <romanton@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This reverts commit d2d66bc0a4.
Reason for revert: It turns out that adding the first page to the pool
of memory managed by the MMIO allocator has undesired consequences
since crosvm will actually use it for MMIO regions. The first page
has special semantics in other code though, and thus we get stray
accesses to this region, with hard-to-predict consequences.
BUG=b:188011323
TEST=cq
Original change's description:
> system_allocator: allow more than one region to be in the pool
>
> Allows crosvm-direct to have 0-0xfff regions to be mapped.
>
> limitations: Only the first regions gets reflected in the
> pool_base/pool_size.
>
> BUG=b:188011323
> BUG=b:184815519
> TEST=build
>
> Change-Id: I9da3cb2b8d5611068f9323d6ebf62f44162838b4
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3450017
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Tested-by: kokoro <noreply+kokoro@google.com>
> Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Bug: b:188011323
Bug: b:184815519
Change-Id: Ib42b3007662a7a49ad876b83a01f1bb88d09d5f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3497136
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Mattias Nissler <mnissler@chromium.org>
Commit-Queue: Mattias Nissler <mnissler@chromium.org>
When a client sends 0-sized data, the device regards that the client
closed the connection and will exit properly.
BUG=b:219674197
TEST=check if no error is shown when a vhost-user blk vmm disconnects
Change-Id: Icd84fb241c39b6dc54a8af41a068a6dd95ce4c2b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3468235
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
With VIRTIO_F_ACCESS_PLATFORM, virtqueues and desc chains of a
virtual device will receive IO virtual addresses. Mappings from
IOVA to GPA will be sent to virtio-iommu. `IpcMemoryMapper` is used
by the virtio device to get the translated addresses from the
virtio-iommu in another process.
Memory blocks with contiguous IOVA but discontinguous GPAs are
supported.
The only way to enable this new path is to hardcode the flag in
the features of each device. The flag should be automatically
for every virtio-vhost-user device in the future. It seems
questionable to add a per device command line option just for
testing.
BUG=b:215307964
TEST=cargo test/block device with VIRTIO_F_ACCESS_PLATFORM enabled
Change-Id: I9a89acf4f38d52816adad34c0dbff043677bebac
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3347309
Reviewed-by: David Stevens <stevensd@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Woody Chow <woodychow@google.com>
pvpanic is a simulated device through which a guest panic event could be
sent to the VMM. More details here:
https://github.com/qemu/qemu/blob/master/docs/specs/pvpanic.txt
Implement pvpanic device emulation and its pci interface.
BUG=None
TEST=Built crosvm. Ran a minimal vm to crash and verified that crosvm
receives the panic event. cargo test on devices.
Change-Id: I766fcc08f07760ad5f64f440a577705efd82e32a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3480575
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vineeth Pillai <vineethrp@google.com>
On Manatee, all the pcie endpoint device are passed through into guest
and all the physical pcie root port are linked to virtual pcie root
port, if one pcie endpoint is connected to physical pcie rp statically
on host, this pcie endpoint should be connected to a virtual pcie rp in
guest statically. But current crosvm pcie could support hotplug device
only, it couldn't support connection device statically at boot time.
This commit add such support. if virtual pcie rp is used to
connect device statically, it won't use slot and won't have hotplug
capability.
BUG=b:185084350
TEST=On Byra-manatee, link all the physical pcie rp to virtual pcie
rp, then check NVME/SD/WIFI's function in CrOS, these devices are
connected to pcie RP on host directly.
Change-Id: Ie277c749da3c2020ad7361bf9ffa0271fb8f415d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3464512
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
